Principal Engineer, RTL ASIC Design
Principal Engineer, RTL ASIC Design
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Job Description
About Marvell
Marvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise cloud and AI automotive and carrier architectures our innovative technology is enabling new possibilities.
At Marvell you can affect the arc of individual lives lift the trajectory of entire industries and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation above and beyond fleeting trends Marvell is a place to thrive learn and lead.
Your Team Your Impact
Infrastructure Processor Business Unit a part of Networking and Processor Business Group encompasses OCTEON and the award-winning OCTEON Fusion-M product families. The SoC family of multi-core CPU processors and Radio Access SoCs offer best-in-class performance low power rich software ecosystem virtualization features and open source application support with highly optimized custom ARM CPU cores providing an excellent solution for a highly flexible end-to-end optimized 5G part of the Infrastructure Processor unit at Marvell you will verify all of the circuitry that goes inside our chips for the general market and for specific customers. These chips use cutting-edge technology to facilitate data transfers at high speeds and you will help verify that each design meets our customers specifications whether theyre a major telecom organization or automotive company etc.What You Can Expect
- Define the sub system architecture micro-architecture and register specification for highly complex SoCs. Drive and participate in specification writeup
- Conduct detailed performance architectural and design requirement reviews with cross-functional teams IP Vendors and customers
- Implement a specification using RTL coding techniques and best practices
- Work with third party vendors to define customization requirements of third party IPs (controller PHY etc.)
- Work with the physical design teams reviewing and providing guidance in floorplanning power analysis synthesis and timing signoff.
- Work with the verification team on pre-silicon verification tasks such as reviewing the verification test plans coverage analysis full-chip simulation and emulation performance and power analysis and debug
- Help develop and/or evaluate design and verification methodologies and participate in improving existing ones
- Collaborate with and provide guidance to the post silicon and software teams for prototype bring up and performance tuning
- Provide mentorship to the more junior team members
What Were Looking For
- Bachelors degree in computer science Electrical Engineering or related fields and 15 years of related professional experience. Masters degree and/or PhD in Computer Science Electrical Engineering or related fields with 12 years of experience.
- Experience in creating architectural micro-architectural and register specifications.
- Verilog/System Verilog RTL coding with System Verilog assertions. Well-versed in all stages of the ASIC design flow (including specification architecture and design implementation prototype bring-up)
- Expertise in high-speed memory protocols (DDR4/5 LPDDR4/5X HBM3)
- Has worked on complex chips such as network processors Switches Machine Learning SoCs etc.
- owning full chip subsystem and block level architecture and design.
- Expertise in any of the following domains would be a big plus: networking embedded systems architecture computer architecture machine learning accelerators.
- Experience with scripting in Perl/Python/Shell
Additional Compensation and Benefit Elements
With competitive compensation and great benefits you will enjoy our workstyle within an environment of shared collaboration transparency and inclusivity. Were dedicated to giving our people the tools and resources they need to succeed in doing work that matters and to grow and develop with us. For additional information on what its like to work at Marvell visit our Careers page.
All qualified applicants will receive consideration for employment without regard to race color religion sex national origin sexual orientation gender identity disability or protected veteran status.
Interview Integrity
As part of our commitment to fair and authentic hiring practices we ask that candidates do not use AI tools (e.g. transcription apps real-time answer generators like ChatGPT CoPilot or note-taking bots) during interviews.
Our interviews are designed to assess your personal experience thought process and communication skills in real-time. If a candidate uses such tools during an interview they will be disqualified from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations including the Export Administration Regulations (EAR). As such applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens lawful permanent residents or protected individuals as defined by 8 U.S.C. 1324b(a)(3) all applicants may be subject to an export license review process prior to employment.
#LI-CP1Required Experience:
Staff IC
Employment Type
Full-Time
