Overview:
TekWissen is a global workforce management provider headquartered in Ann Arbor Michigan that offers strategic talent solutions to our clients world-wide. This Client is an American multinational semiconductor company based in Santa Clara California that develops computer processors and related technologies for business and consumer markets. global company that specializes in manufacturing semiconductor devices used in computer processing. The company also produces flash memories graphics processors motherboard chip sets and a variety of components used in consumer electronics goods.
Job Title: Silicon Power Analysis and Optimization Engineer
Work Location: San Jose CA
Duration: 3 Months
Work Type: Temporary Assignment
Job Type: Hybrid
Job Description:
TOP MUST HAVE SKILLS:
- Extensive power optimization experience in low power ASIC design
- Proficiency in RTL design languages like Verilog or VHDL
- Proficiency in programming languages like Perl Python and/or Ruby
- Experience with power analysis tools like PowerArtist PrimePower RTL and/or PrimeTime PX
- We are seeking a power optimization engineer who has expertise in power optimization methodology to analyze and optimize pre-silicon IP RTL designs.
Key responsibilities:
- Implement the flow and methodology at the IP-level to align with the internal power optimization workflow for RTL power optimization
- Automate power data collection and track key power metrics through the development phases
- Support RTL and gate-level power rollup and analysis
- Work closely with design and implementation teams to analyze power data and identify power optimization opportunities
TekWissen Group is an equal opportunity employer supporting workforce diversity.