Imagine yourself collaborating across many fields playing a decisive role of getting innovative products to millions of customers! You will have the opportunity to build new insights into silicon optimization as well as work with a team of hardworking engineers and be involved in HW/model correlation efforts of mobile SoC design. - Modeling power dissipation and power delivery- Establishing voltages for DVFM states of IPs including Neural Engines CPUs Graphics compute (AI/ML) accelerators media IPs caches and fabric.- Modeling power dissipation for customer use-cases.- Interacting with the Technology team Silicon Validation and Product Engineering teams to establish voltage-frequency design points pre- and post- silicon.- Working with the power lab and test teams to correlate models to HW data.
- Masters degree in Electrical and Computer Engineering
- 2 years of relevant industry experience
- Experience with lower power design techniques for power consumption optimization
- Develop test plans at the SoC level
- RTL design experience
- Programming experience with Python and Perl
- Understanding of electrical properties of on-die PDN power gating package and system power delivery.
- Skills in scripting data analysis and experience with EDA tools.
- Understanding of VLSI design flow and CMOS technology.
- Extensive background in EE.
- Ability to understand and model thermal control loops and throttling mechanisms.
- Familiarity with physical design tools for power optimization.
- Great teammate and excellent communication skills.
Imagine yourself collaborating across many fields playing a decisive role of getting innovative products to millions of customers! You will have the opportunity to build new insights into silicon optimization as well as work with a team of hardworking engineers and be involved in HW/model correlatio...
Imagine yourself collaborating across many fields playing a decisive role of getting innovative products to millions of customers! You will have the opportunity to build new insights into silicon optimization as well as work with a team of hardworking engineers and be involved in HW/model correlation efforts of mobile SoC design. - Modeling power dissipation and power delivery- Establishing voltages for DVFM states of IPs including Neural Engines CPUs Graphics compute (AI/ML) accelerators media IPs caches and fabric.- Modeling power dissipation for customer use-cases.- Interacting with the Technology team Silicon Validation and Product Engineering teams to establish voltage-frequency design points pre- and post- silicon.- Working with the power lab and test teams to correlate models to HW data.
- Masters degree in Electrical and Computer Engineering
- 2 years of relevant industry experience
- Experience with lower power design techniques for power consumption optimization
- Develop test plans at the SoC level
- RTL design experience
- Programming experience with Python and Perl
- Understanding of electrical properties of on-die PDN power gating package and system power delivery.
- Skills in scripting data analysis and experience with EDA tools.
- Understanding of VLSI design flow and CMOS technology.
- Extensive background in EE.
- Ability to understand and model thermal control loops and throttling mechanisms.
- Familiarity with physical design tools for power optimization.
- Great teammate and excellent communication skills.
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