Pre-Silicon Digital Verification Engineer

Apple

Posted on : 23-08-2025

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1 Vacancy

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Job Location

Cupertino, CA - USA

Monthly Salary

Not Disclosed

Salary Not Disclosed

Vacancy

1 Vacancy

Posted on : 23-08-2025

Job Description

You will have the responsibilities as follows: - Collaborate in developing precise design specifications for digital control blocks- Use design specifications to create block and chip level verification plans- Architect and create block level verification elements- Assist in architecting chip and system level verification environments.- Use System Verilog and UVM to develop drivers tests reference models and checkers- Debug test failures and work with designers to develop fixes- Use formal verification to prove assertions derived from microarchitecture specifications- Use functional and code coverage to track progress and gauge tapeout readiness

BS and a minimum of 3 years of relevant industry experience

Extensive course work in digital design and computer architecture
Foundation in object oriented programming techniques
Lab courses or work experience with System Verilog
Familiar with constrained random verification techniques
Familiarity with clock domain crossing design and verification techniques
Knowledge of digital ASIC development flow
Familiarity with power reduction techniques in digital ASICs

Employment Type

Full Time

Company Industry

Key Skills

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About Company

Apple

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Pre-Silicon Digital Verification Engineer

Apple

Job Description

Employment Type

Company Industry

Key Skills

About Company

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