Digital IC Design Principal Engineer
Digital IC Design Principal Engineer
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Job Description
About Marvell
Marvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise cloud and AI automotive and carrier architectures our innovative technology is enabling new possibilities.
At Marvell you can affect the arc of individual lives lift the trajectory of entire industries and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation above and beyond fleeting trends Marvell is a place to thrive learn and lead.
Your Team Your Impact
As a Digital IC Design Principal Engineer with Marvell youll be a member of the Central Engineering business group. If you picture Marvell as a wheel Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel including Automotive Storage Security and Networking. Youll be part of a digital team of about eight people making a big impact on this organization working on ultra-dense and performance Static Random Access Memory (SRAM) memory compilers.This team hires some of the biggest problem solvers in Silicon and has a huge impact on the work done at Marvell. The customers served by this team are often other chip companies and big tech companies familiar names to all candidates.
What You Can Expect
As a Principal Design Engineer you will lead micro-architecture and RTL development and HW/SW co-design efforts working across multi-functional teams in developing state-of-the-art designs for the up and coming CXL product responsibilities will include but not be limited to: Responsible for micro-architecture design and development of SOC and associated component IP like Memory Controllers/PCIE interface/CXL interfaces etc. Working with Architects and Verification engineers to deliver develop complex high performance and timing critical designs through all aspects of the SoC front-end design flow (incl. timing closure and power optimization)What Were Looking For
Bachelors degree in Computer Science Electrical Engineering or related fields and 10-15 years of related professional experience. Masters degree and/or PhD in Computer Science Electrical Engineering or related fields with 5-10 years of experience. Strong understanding of SoC architecture processor cores memory and peripheral interfaces through hands on prior experience. Extensive experience in Verilog/VHDL Spyglass and Quality checks of the implemented RTL for LINT CDC. Hands on experience in interpretive language such as Perl/Python. Proven track record of delivering production-quality designs on aggressive development schedules. Domain expertise in CXL/PCIe protocols DDR memory controllers is a plus.Additional Compensation and Benefit Elements
With competitive compensation and great benefits you will enjoy our workstyle within an environment of shared collaboration transparency and inclusivity. Were dedicated to giving our people the tools and resources they need to succeed in doing work that matters and to grow and develop with us. For additional information on what its like to work at Marvell visit our Careers page.
All qualified applicants will receive consideration for employment without regard to race color religion sex national origin sexual orientation gender identity disability or protected veteran status.
#LI-CP1Required Experience:
Staff IC
Employment Type
Full-Time
