RFIC - PLL Design Engineer
RFIC - PLL Design Engineer
Posted on :
02-08-2025
Employer Active
1 Vacancy
Job Alert
You will be updated with latest job alerts via emailValid email field required
Send jobs
Share
Send me jobs like this
Job Alert
You will be updated with latest job alerts via emailValid email field required
Send jobs
Monthly Salary
USD 181100 - 318400
Vacancy
1 Vacancy
Posted on :
02-08-2025
Job Description
As an RFIC-PLL Designer you will provide analog and digital PLL solutions for wireless SoC and drive them to mass production for Apple. Responsibilities include: - Lead design of radio transceiver chains including analog PLLs - VCOs digital PLLs - DCOs LOGen and chain of blocks in RX and TX for wireless connectivity products.- Drive radio KPI (power area performance) to meet product requirements - Work with multi-functional teams including platform architecture wireless design RF HW and SW to define radio features enabling wireless innovation. - Work closely with RF Systems on block-level and high-level specifications of the PLL-LOGen TX and RX line-ups and the accurate distribution of spec margins in the chain.- Design of RF and Analog loopbacks for calibration and compensation.- Work through Co-Existence scenarios and design to meet the CoEx requirements.- Lead all aspects of the floorplan layout and verification of the design to ensure a successful tape-out.- Provide design versus silicon measurements correlation and compliance with volume production specifications.
- BS and 10 years of relevant industry experience.
- Solid experience with RF/analog and mixed-signal design experience in groundbreaking RF CMOS design.
- Experienced in the design and development of fractional N Synthesizers Digital PLLs Analog PLLs and LO-Gen for high-performance applications and also low power applications.
- Hands-on experience in designing TDC GRO Digital Filters Sigma Delta Modulators Pre-scalers and MMD DCOs PFD-CP and VCOs. Modeling analysis and design of SD noise cancellation and spur cancellation techniques.
- Experienced in Cadence Virtuoso Spectre RF Matlab EM simulation (EMX HFSS) and similar tools.
- Familiarity with mixed-signal mode verification methodology (SystemVerilog AMS Nanotime).
- Extensive experience in fractional N synthesizer and LOGen silicon characterization and debugging.
- Direct experience in designing and bringing wireless transceivers into mass production in deep sub-micron RFCMOS technology.
- Deep understanding of analog mixed-signal and RF circuit design. This includes LNAs PAs mixers baseband filters VGAs and calibration methods associated with high-performance wireless systems.
- Familiarity with various RF transceiver architectures and their trade-offs system specifications and ability to work with system architects to translate system requirements into circuit requirements at the IC level.
- Proven capability working with digital design group for an optimum partition between digital and analog domain and timing requirements.
- MSEE and/or PhD with extensive experience.
Employment Type
Full Time
Key Skills
Report This Job
Disclaimer: Drjobpro.com is only a platform that connects job seekers and employers. Applicants are advised to conduct their own independent research into the credentials of the prospective employer.We always make certain that our clients do not endorse any request for money payments, thus we advise against sharing any personal or bank-related information with any third party. If you suspect fraud or malpractice, please contact us via contact us page.
