As a Radio Integration Engineer you will work in a team developing Wireless SoCs with custom hardware accelerators as well as multiple ARM-based sub-systems. You will integrate industry standard and custom hardware IP into SoCs. You will work closely with SoC architects IP developers to develop SoCs that meet the power performance and area goals for Apple devices. You will help define the processes methods and tools for the design and implementation of large complex SoCs. You will develop and maintain methodology and flow checks for your design. Interact with our verification team to ensure appropriate validation and coverage goals are met. Youll ensure security assumptions for the chip are accurately implemented within the blocks. Collaboration with multi-disciplinary groups to make sure designs are delivered on time and with the highest quality by incorporating accurate checks at every stage of the design this highly visible role you will be at the center of the ASIC Integration effort collaborating with all fields with a critical impact on getting functional products to millions of customers quickly. Work with platform architects system groups and RFIC designers to develop digital modules within the RFIC. Modules can include but are not limited to SPI calibration engines high-speed digital front-end blocks for Tx/Rx digital filters and digital control. Design digital blocks for digitally intensive RF circuits like ADPLL digital transmitters and receivers. Develop signal processing intensive design for wireless communication SoCs including: Write specifications and Microarchitecture definition. IP integration RTL logic design and DV support. Run tools to ensure lint-free and CDC clean design. Synthesis timing constraints equivalence check and DFT insertion. Work with algorithm and software team to ensure performance and power efficiency. Bus fabric especially APB/AHB/AXI. Chip-to-chip interface especially SPI I2C PCIe and USB. Power management with multiple power domains.
BS and 3 years of relevant industry experience.
This position requires detailed knowledge of the ASIC design flow synthesis static timing analysis scripting and netlist generation.
Relevant design experience in SoC and/or radio/transceiver PLL Controller.
Experience with Digital Mixed Signal design.
Extraordinary leadership skills and ability to encourage team members with an innate ability to see the bigger picture.
Passion for owning and driving design schedules using well-defined metrics.
Experience working in a high-energy multi-disciplined engineering environment strong at multi-tasking and real-time crisis management.
Ability to understand and extract action plans from sophisticated technical discussions and translate into succinct messaging for multi-functional and executive status reporting.
Excellent debugging skills and shown ability to drive resolution of critical problems.
At Apple base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $147400 and $272100 and your base pay will depend on your skills qualifications experience and location.
Apple employees also have the opportunity to become an Apple shareholder through participation in Apples discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards and can purchase Apple stock at a discount if voluntarily participating in Apples Employee Stock Purchase Plan. Youll also receive benefits including: Comprehensive medical and dental coverage retirement benefits a range of discounted products and free services and for formal education related to advancing your career at Apple reimbursement for certain educational expenses including tuition. Additionally this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits.
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