Mixed-Signal IC Layout Lead
Mixed-Signal IC Layout Lead
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Not Disclosed
Salary Not Disclosed
1 Vacancy
Job Description
Full-time Benefits
Richardson Texas (onsite/hybrid)
US Citizen or US Permanent Resident
Responsibilities:
Chip-level integration including IP blocks digital blocks and analog blocks
Chip-level verification including DRC/LVS/EMIR parasitic extraction and metal density fill
Required Experience:
10 years industry experience in IC layout
Solid experience in Cadence Virtuoso/Synopsys Custom Compiler Layout tool and verification tools Calibre/PVS/IC Validator
Experience in LVS and DRC
Good understanding of the semiconductor foundry process flow
BSEE or Associate of Applied Science (ASS) degree in IC Layout Design
Strong communication and customer service skills ability to work under time constraints attention to details reading layout specifications
IC MASK LAYOUT DESIGN GROUP on LinkedIn: Leon
Talent Acquisition
Chelsea Search Group
cell
(are we connected)
Employment Type
Full Time
