Staff Engineer, High Speed Analog Design

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Our technology solutions power the tools you use every day--including smartphones electric vehicles hyperscale data centers IoT devices and so much more. Here youll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of whats possible and powering the future.

We believe innovation and growth are driven by an inclusive culture and a diverse workforce. Were dedicated to empowering people to be their true selves. Together were building a better tomorrow for our employees customers partners and communities.

The Advanced Interconnect Lab (AIL) is seeking a self-driven and motivated professional qualified individual to join their team located in San Jose CA. The qualified individual will be responsible for research and development of a wide variety of cutting-edge circuits and architectures for optical interconnects including analog front end SERDES and error corrections.

Location: Daily onsite presence at our San Jose office/headquarters in alignment with our Flexible Work policy

What Youll Do

• High speed analog/mixed-signal circuit design simulation and layout
• Pre-layout and post-layout simulation and verification
• Parasitic extraction and post-layout simulation
• Top level spice and mixed-mode simulations to validate top level integration.
• Writing descriptions detailed information and test plan of the designed blocks
• Analyzing and interpreting test results

What You Bring

• BS with 10 years or MS with 8 years of experience or PhD with 5 years in semiconductor field experience preferred.
• At least 5 years of experience in designing Si-based high speed circuit including but not limited to PLL/DLL CDR RO/LC oscillators regulators TIA limiting amplifiers VGAs and digitally-assisted analog techniques
• Deep understanding of impedance matching return loss phase noise jitter analysis budgeting and feedback loop dynamics
• Production experience with one or more of the above-mentioned blocks
• Proficiency in analog/mixed-signal circuit design simulation and analysis Experience with LC and RO VCO design. Good knowledge of band gaps bias op-amps LDOs feedback and compensation techniques as well as digitally assisted analog circuit techniques
• Lab and ATE test plans measurement for characterization and volume production
• Experience with LC and RO VCO design. Good knowledge of band gaps bias op-amps LDOs feedback and compensation techniques as well as digitally assisted analog circuit techniques
• Lab and ATE test plans measurement for characterization and volume productionincluding bandgaps bias opamps LDOs feedback and compensation techniques
• Proficient in using Cadence Synopsys and Siemens design tools such as Virtuoso Hspice StarRC Calibre etc.
• Hands-on experience in testing and characterization
• Attention to details exceptional focus on understanding the problems at hand and ensure thoroughness in problem-solving
• Good written and verbal communication skills with outstanding teamwork capabilities
• Self-motivated with a growth mindset
• Inclusive adapt your style to the situation and diverse global norms of our people
• An avid learner you approach challenges with curiosity and resilience seeking data to help build understanding
• Youre collaborative building relationships humbly offering support and openly welcoming approaches.
• Innovative and creative you proactively explore new ideas and adapt quickly to change

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