Senior ASIC Design Engineer
Senior ASIC Design Engineer
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1 Vacancy
Job Description
Position: Senior ASIC Design Engineer
Location: San Jose CA (Complete onsite) for locals only
Duration: 612 months
Experience: 8 years (Relevant)
A bachelors degree in electrical or computer engineering accompanied by a minimum of 10 years of experience in ASIC or a related field or a masters degree in electrical or computer engineering with at least 8 years of experience in ASIC or a related discipline.
A comprehensive understanding of FPGA design with proven expertise in partitioning multimillion gate designs across multiple FPGAs.
Demonstrated experience in RTL coding using Verilog/System Verilog and integration of thirdparty IPs
Our expectation is that candidate is proficient with the entire HAPS flow not just limited to building images
Having the experience to setup HAPS systems and triage issues around HAPS bringup is must for this position
Thank You
Pratiksha Bhatt
Talent Acquisition Specialist
Pro Integrate LLC ISO 9001 and ISO 27001 Certified Company
HQ: 347 5th Ave SuiteNew York NY USA 10016
Employment Type
Full Time
