Staff Physical Design Engineer
Staff Physical Design Engineer
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Salary Not Disclosed
1 Vacancy
Job Description
About Marvell
Marvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise cloud and AI automotive and carrier architectures our innovative technology is enabling new possibilities.
At Marvell you can affect the arc of individual lives lift the trajectory of entire industries and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation above and beyond fleeting trends Marvell is a place to thrive learn and lead.
Your Team Your Impact
Join Marvells Central Physical Design team a dynamic group at the heart of backend design services for Marvells SystemonChip (SoC) design projects. As a Staff Physical Design Engineer with expertise in Block Place and Route (PNR) youll collaborate with Marvells cuttingedge SoC design groups driving innovation in power and performance for nextgeneration optical DSP chips. This team partners closely with other teams across the organization to ensure robust design successful tapeouts and optimized performance for data center server and networking applications.What You Can Expect
In this pivotal role you will contribute to the development of advanced backend design flows and methodologies. Your expertise in blocklevel PNR and handson experience in physical design tools will help us achieve highperformance lowpower and reliable designs across a spectrum of challenging SoC products. Youll also have the opportunity to shape backend design strategies and be instrumental in Marvells success in delivering industryleading data infrastructure solutions.
What You Can Expect
- Comprehensive BlockLevel PNR Responsibilities:
- Take charge of blocklevel PNR tasks from floor planning and power grid design to place and route clock tree synthesis and timing closure.
- Perform power and signal integrity analysis to ensure optimal design reliability and robustness.
- Collaborative Physical Design Process:
- Partner with frontend integration and verification teams to ensure alignment and continuity throughout the SoC design lifecycle.
- Ensure physical verification compliance including DRC/LVS and antenna checks to achieve firstpass silicon success.
- Methodology Development and Process Automation:
- Develop and refine physical design methodologies applying automation through scripting to streamline design workflows.
- Support the creation of design flows and processes that improve efficiency consistency and scalability across Marvells physical design teams.
What Were Looking For
- Education & Experience:
- Bachelors or Masters degree in Electrical Engineering Computer Engineering or a related field.
- 3 years of experience in physical design with a focus on blocklevel PNR for advanced CMOS process nodes (e.g. 7nm 5nm or below).
- Technical Proficiency:
- Proficient with industrystandard EDA tools for physical design including Cadence Genus and Innovus and Synopsys IC Compiler and Fusion Compiler.
- Strong expertise in static timing analysis tools such as Tempus or PrimeTime and EM/IRDrop/Crosstalk analysis tools like Voltus or PrimeRail.
- Working knowledge of physical verification and formal verification tools (e.g. Calibre LEC Formality) is advantageous.
- Programming & Automation Skills:
- Demonstrated ability to create scripts (Tcl Perl Makefile) for automating design processes and improving overall workflow efficiency.
- Key Attributes:
- Detailoriented selfmotivated team player with effective communication skills and a commitment to collaborative success.
Expected Base Pay Range (USD)
$ per annumThe successful candidates starting base pay will be determined based on jobrelated skills experience qualifications work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation and Benefit Elements
At Marvell we offer a total compensation package with a base bonus and and financial wellbeing are part of the package. That means flexible time off 401k plus a yearend shutdown floating holidays paid time off to volunteer. Have a question about our benefits packages health or financial Ask your recruiter during the interview process.All qualified applicants will receive consideration for employment without regard to race color religion sex national origin sexual orientation gender identity disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at .
#LIJS22Required Experience:
Staff IC
Employment Type
Full-Time
