drjobs ASICFPGA Design and Verification Engineer Experienced Lead or Senior

ASICFPGA Design and Verification Engineer Experienced Lead or Senior

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Job Location drjobs

Tukwila, WA - USA

Monthly Salary drjobs

$ 155550 - 210450

Vacancy

1 Vacancy

Job Description

ASIC/FPGA Design and Verification Engineer (Experienced Lead or Senior)

Company:

The Boeing Company

Boeing Space Intelligence & Weapons Systems has an exciting opportunity for an ASIC and/or FPGA Design and Verification Engineer (Experienced Lead or Senior) to join us as part of our Boeing Electronic Products team at the heart of Boeings products; ASICs and FPGAs in Kent or Tukwila WA.

Our site enjoys every other Friday off a part of our 9/80 flexible schedule! We also get to enjoy 4 weeks of paid time off and 1214 Paid Holidays including our Winter Break from Christmas to New Years.

Our Electronics Products team goal is to be Boeings sole source for electronics and have grown by over 400 with significant opportunities to support more Boeing Platforms. We seek multiple leadership level engineers who are ambitious and will thrive in a technology development environment and can work the full spectrum from research through flight insertion. Were highly supportive of innovative thinking we respect and acknowledge hard work we recognize maturity and integrity and we reward bottomline achievement. At Boeing we value your curiosity your determination and your imagination. #TheFutureIsBuiltHere

The work we do enables the missions and needs of our customers as we help Connect Protect Explore and Inspire the world. Our team of engineers leverage leadingedge technology and work with worldclass partners to provide some of the most complex SoCs in the world. We develop robust highperformance custom processors using the latest ARM IP to enable highintegrity low SWAPC flight computers. Plus were applying the latest digital IC design processes with industrybest tools to enable applications that cut across every domain at Boeing.

Our diverse development portfolio provides opportunities to learn with exposure to the breadth of the Boeing product line approximately half our design work is within the Space & Launch business unit and half is from other parts of Boeing (AvionX; Missiles & Weapons; Strike Surveillance and Mobility; and Autonomous Systems).

As an ASIC/FPGA Engineer on the Boeing Electronic Products team you will lead a growing team and develop stateoftheart digital ICs/SoCs to support the most critical programs across the Boeing Defense and Security enterprise. We collaborate with other electronics groups across the company and around the world and support ASIC/FPGA design and verification for electronics that we build in El Segundo or for units designed at other sites.

Position Responsibilities:

  • Lead FPGA/ASIC designs including multiFPGA/ASIC programs and teams with design and verification engineers and manage team to meet program milestones

  • Collaborate with customers system engineers and hardware engineers to drive requirements capture and architect digital logic functions to meet mission/customer needs

  • Explore tradespace of potential ASIC/FPGA technologies and determine the optimal parts weighing Schedule Cost Risk Area Power (S) vs. performance

  • Implement FPGA/ASIC with latest design practices and tools from blocklevel microarchitecture through HDL coding and physical design realization (through gatelevel netlists for ASIC designs)

  • Integrate DSP IP from Boeings algorithm team and thirdparty IP as needed

  • Perform static timing analysis LEC CDC linting and other necessary checks to ensure the design is completed on schedule

  • Develop Functional Coverage Models and perform Code Coverage to verify designs in simulation

  • Create selfchecking and reusable test benches from scratch applying Object Oriented Programming concepts such as Inheritance and Polymorphism and leverage UVM to create drivers monitors predictors and scoreboards

  • Drive FPGAbased prototyping and validation depending on program and system requirements and complexity

  • Validate design through hardware integration test with special test equipment testbeds and higherlevel systems as needed

  • Train and mentor less senior engineers across the department and help build effective project teams

This position is expected to be 100 onsite. The selected candidate will be required to work onsite at one of the listed location options.

This worksite participates in Boeings optional 9/80 schedule rotation. 9/80 is a rotation in which employees can work 9 hour shifts 8 days per pay period (biweekly) and receive every other Friday off.

Travel may be required up to 10 of the time; Domestically and/or Internationally depending on business needs.

This position requires the ability to obtain a U.S. Security Clearance for which the U.S. Government requires U.S. Citizenship. An interim and/or final U.S. Secret Top Secret or Top Secret SCI Clearance PostStart is required.

Basic Qualifications (Required Skills/Experience):

  • Bachelor of Science degree from an accredited course of study in engineering engineering technology (includes manufacturing engineering technology) chemistry physics mathematics data science or computer science

  • 1 or more years of experience with Hardwarebased integration and test of ASIC/FPGA designs

  • 5 or more years of experience working with digital ASIC/FPGA design and verification

Preferred Qualifications (Desired Skills/Experience):

  • 5 years of related work experience or an equivalent combination of education and experience

  • 10 years of related work experience or an equivalent combination of education and experience

  • 5 or more years of experience with ASIC development including architectural definition and detailed design implementation and functional verification using SystemVerilog/VHDL/Verilog

  • Proven record of leading ASIC/FPGA design and/or verification teams including tracking and reporting progress to stakeholders

  • Leading ASIC/FPGA design and/or verification teams including tracking and reporting progress to stakeholders

  • Experience with hardware emulators especially Palladium

  • Proficiency with hardware verification languages: System Verilog System Verilog Assertions

  • Proficiency with Object Oriented Programming Concepts: Inheritance Polymorphism etc.

  • Ability to create test plans and selfchecking and reusable testbenches from scratch

  • Experience developing Functional Coverage Models and Closing Code Coverage

  • Experience with highspeed Serdes interfaces (JESD204C PCIe Ethernet)

  • Proficient in scripting languages: Make Perl Python etc.

  • Revision Control Systems: svn cvs git

  • Proficient in Linux Environments

  • Familiarity with spacebased design techniques and radiation mitigation

Typical Education/Experience:

Experienced:

Education/experience typically acquired through advanced technical education from an accredited course of study in engineering computer science mathematics physics or chemistry (e.g. Bachelor) and typically 5 or more years related work experience or an equivalent combination of technical education and experience (e.g. PhD Master3 years related work experience). In the USA ABET accreditation is the preferred although not required accreditation standard.

Lead:

Education/experience typically acquired through advanced technical education from an accredited course of study in engineering computer science mathematics physics or chemistry (e.g. Bachelor) and typically 9 or more years related work experience or an equivalent combination of technical education and experience (e.g. PhD4 years related work experience Master7 years related work experience). In the USA ABET accreditation is the preferred although not required accreditation standard.

Senior:

Education/experience typically acquired through advanced technical education from an accredited course of study in engineering computer science mathematics physics or chemistry (e.g. Bachelor) and typically 14 or more years related work experience or an equivalent combination of technical education and experience (e.g. PhD9 years related work experience Master12 years related work experience). In the USA ABET accreditation is the preferred although not required accreditation standard.

Relocation:

This position offers relocation based on candidate eligibility.

Drug Free Workplace:

Boeingis a Drug Free Workplace where post offer applicants and employees are subject to testing for opioids amphetamines PCP and alcohol when criteria is met as outlined in our policies.

Shift Work Statement:

This position is for 1st shift.

Union:

This is a union represented position

At Boeing we strive to deliver a Total Rewards package that will attract engage and retain the top talent. Elements of the Total Rewards package include competitive base pay and variable compensation opportunities.

The Boeing Company also provides eligible employees with an opportunity to enroll in a variety of benefit programs generally including health insurance flexible spending accounts health savings accounts retirement savings plans life and disability insurance programs and a number of programs that provide for both paid and unpaid time away from work.

The specific programs and options available to any given employee may vary depending on eligibility factors such as geographic location date of hire and the applicability of collective bargaining agreements.

Pay is based upon candidate experience and qualifications as well as market and business considerations.

Summary pay range for Experienced Level: $104550 $141450

Summary pay range for Lead Level: $126650 $171350

Summary pay range for Senior Level: $155550 $210450

Potential Additional New Hire SignOn Bonus when you have a Top Secret / SCI U.S. Government clearance that has been active in the past 24 months. Current employees and subsidiary employees not eligible for signon bonuses.

Language Requirements:

Not Applicable

Education:

Bachelors Degree or Equivalent

Relocation:

This position offers relocation based on candidate eligibility.

Export Control Requirement:

This position must meet export control compliance requirements. To meet export control compliance requirements a U.S. Person as defined by 22 C.F.R. 120.15 is required. U.S. Person includes U.S. Citizen lawful permanent resident refugee or asylee.

Safety Sensitive:

This is not a Safety Sensitive Position.

Security Clearance:

This position requires the ability to obtain a U.S. Security Clearance for which the U.S. Government requires U.S. Citizenship. An interim and/or final U.S. Secret Clearance PostStart is required.

Visa Sponsorship:

Employer will not sponsor applicants for employment visa status.

Contingent Upon Award Program

This position is not contingent upon program award

Shift:

Shift 1 (United States of America)

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Required Experience:

Senior IC

Employment Type

Full-Time

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