Field Programmable Gate Array Design Engineer
Field Programmable Gate Array Design Engineer
Employer Active
Job Alert
You will be updated with latest job alerts via email
Share
Job Alert
You will be updated with latest job alerts via email
Not Disclosed
Salary Not Disclosed
1 Vacancy
Job Description
Sidus Space (NASDAQ: SIDU) is a space mission enabler providing flexible costeffective solutions including satellite manufacturing and technology integration AIdriven spacebased data solutions mission planning and management operations AI/ML products and services and space and defense hardware manufacturing. With its mission of Space Access Reimagined Sidus Space is committed to rapid innovation adaptable and costeffective solutions and the optimization of space system and data collection performance. With demonstrated space heritage including manufacturing and operating its own satellite and sensor system LizzieSat Sidus Space serves government defense intelligence and commercial companies around the globe.
Strategically headquartered on Floridas Space Coast Sidus Space operates a 35000squarefoot space manufacturing assembly integration and testing facility and provides easy access to nearby launch facilities. But its our people who truly set us apart. We foster a culture of collaboration continuous learning and agility empowering our team to innovate and evolve in a rapidly changing industry. Join us at Sidus Space to be part of something extraordinary and help shape the future of space access!
Job Summary
The Field Programmable Gate Array (FPGA) Design Engineer is responsible fordesigning developing and testing digital logic circuits implementing new hardware architectures and writing firmware to control and configure FPGAbased systems.
Essential Duties and Responsibilities
- Full life cycle development and integration of Verilog/VHDL into different families of FPGAs
- Firm understanding of FPGA design process including requirements preliminary design peer reviews detailed design test plan generation and integration and test
- Perform architectural designincluding block diagram trade off studies and design reviews
- Create selfchecking and reusable test benches from scratch
- Develop functional coverage models and close code coverage
- Create written test cases procedures and document results
- Integrate with HW/software supporting lab integration and complete testing/qualification of a deliverable system
- Support board level FPGA integration
- Perform detailed design reviews
- Treat all team members with respect and dignity ensuring a collaborative culture is continually developed and maintained.
- Other duties as assigned**
Required Education and Experience
- Experience in aerospace engineering computer science programming hardware or other relevant industry experience
- Bachelors degree in aerospace engineering computer science or another relevant STEM in lieu of education may be considered.
- VHDL or Verilog experience
- Experience with hand coded implementations above and beyond incorporating vendor COTS IP
- Testbench development for the verification of RTL blocks
- Familiarity using FPGA simulation and synthesis tools (e.g. Questasim Synplify Modelsim Xilinx ISE and Vivado)
- Strong oral and written communication skills and the ability to document and present work status
- Proficiency in Microsoft 365 including Excel Word Outlook and Teams.
Desired Skills and Experience
- Commitment to providing the highest quality products and services that meet or exceed the requirements and expectations of our customer actively pursuing opportunities for continual improvements of service quality.
- Experience verifying ASICs / FPGAs
- Experience with building and setting up scalable simulation/verification environments
- Experience with and understanding of Altera and/or Xilinx FPGA architectures
- Good understanding of the Vivado and/or Quartus tool suite
- Revision Control Systems: svn git
- Proficient in Linux Environments
- Experience with highspeed memory interfaces (DDRx)
- Familiarity with test scoping for complex designs code coverage functional coverage assertions
- Ability to focus on finding design issues corner cases and out of box ideas to make designs more robust
- Experience with highspeed serial protocols (PCI Express SRIO Ethernet LVDS CameLink)
- Experience with Analog to Digital (AD) and Digital to Analog (DA) interfaces
- Experience with control protocols such I2C SPI RS232/422
- FPGA lab validation with lab equipment (e.g Oscilloscopes Logic Analyzers)
- Experience with Unix scripting C Python bash/csh
- Experience with embedded SystemOnChip technologies radio systems development
- Ability to collaborate with many different teams/individuals to reach a common goal by building mutual trust respect and cooperation maintaining positive and professional relationships and contributing to a culture of inclusion.
Physical Requirements
- Stationary Work occasionally exerting up to 10 pounds of force to transport objects remaining mostly stationary sometimes requiring moving about the work center on concrete surfaces
- Computer Work daily use of laptop computer monitor screen keyboard and mouse sometimes utilizing a headset with microphone & speakers.
Travel Requirement
Able to travel <10 of the time. (Or however often needed to be onsite)
Shift/Schedule
This position is for the day shift generally working 8:00am 5:00pm.
Total Rewards and Perks:
At Sidus Space we ask a lot of our team members which is why we give so much in return. In addition to a competitive salary a BestinClass benefit program with a generous employer paid portion as well as a matching 401(k) on Day ONE we offer a lot of perks including:
- Jeans every day
- Regular onsite food trucks
- 5 free company tshirts for Manufacturing Staff or credit to the Company Store
- Paid Time Off Up to 4 weeks of vacation 5 sick days and 11 paid holidays 5 of which can be floated
- Adjustable standup desks
- Employee referral bonus program
- Educational assistance and professional training opportunities
- Company golf outings and other social events
Additional Eligibility Qualifications
- All candidates selected will be subject to background investigation and drug screen
- This position requires access to onsite locations managing government information which contains Not Releasable to Foreign Nationals (NOFORN) data. Therefore to meet NOFORN requirements you will have to provide proof of US Citizenship and attest that you do not have dual citizenship.
- Must be able to perform the essential functions of the position satisfactorily and if requested reasonable accommodations will be made to enable individuals with disabilities to perform the essential functions of their job absent undue hardship.
SIDUS SPACE is an Equal Opportunity Employer fostering a respectful work culture that values all contributors. All qualified applicants will receive consideration for employment without regard to race color religion sex sexual orientation gender identity or expression pregnancy age national origin disability status genetic information protected veteran status or any other characteristic protected by law. For more information on EEO Is the Law please visit Action and Disability Accommodation
Applicants wishing to receive information on Sidus Space Affirmative Action Plans or applicants requiring a reasonable accommodation in order to participate in the application and/or interview process please contact us at
Employment Type
Full-Time
