Principal UVM Digital Verification Engineer
Principal UVM Digital Verification Engineer
Employer Active
Job Alert
You will be updated with latest job alerts via email
Share
Job Alert
You will be updated with latest job alerts via email
Job Description
Overview:
Draper is an independent nonprofit research and development company headquartered in Cambridge MA. The 2000 employees of Draper tackle important national challenges with a promise of delivering successful and usable solutions. From military defense and space exploration to biomedical engineering lives often depend on the solutions we provide. Our multidisciplinary teams of engineers and scientists work in a collaborative environment that inspires the crossfertilization of ideas necessary for true innovation. For more information about Draper visit www.draper.
Job Description Summary:
Drapers Digital Design Team is seeking a motivated and experienced Principal UVM Digital Verification Engineerto tackle novel verification challenges in FPGAs and ASICs. In this role you will apply modern verification strategies to complex digital and mixedsignal designs in the areas of embedded security cryptography signal and image processing navigation and communications.Job Description:
Duties/Responsibilities
Independently drive solutions to complex problems develop requirements propose ways forward when customer requirements are unclear or incomplete and adapt appropriately to changes in requirements.
Subject Matter Expert (SME) in Systems Engineering
Provide insight and suggest design modifications based on analysis outcomes and to apply analysis techniques across a range of technical challenges and disciplines
Identify program/systemlevel technical risks and develop and execute mitigation strategies.
Develop document and teach best practices to less experienced engineers
Actively mentors. Recognizes strengths and weaknesses in others and provides thoughtful constructive feedback.
Work in a collaborative multidisciplinary environment including stakeholders and external partners.
Contribute to translation of requirements into technical and architectural decisions.
Identify and develop relevant modeling and analysis techniques and develop or integrate multidomain qualitative models.
Present results that support systemlevel analysis performance tradeoffs and realtime decisionmaking.
Communicate technical concepts effectively with customers engineers managers and other stakeholders of all relevant disciplines.
Skills/Abilities
Excellent mathematical skills.
Thorough understanding of engineering theories and procedures.
Ability to collaborate within a diverse and multidisciplinary team.
Excellent verbal and written communication skills.
Excellent organizational skills and attention to detail.
Excellent time management skills with the proven ability to meet deadlines.
Demonstrate strong organization planning and time management skills to achieve program goals.
Demonstrated knowledge of multiple problem domains.
Multitask and adapt to evolving priorities.
Ability to quickly become knowledgeable in new domains.
Education
Bachelors degree in Aerospace Electrical Mechanical or other relevant Engineering field. Masters degree preferred.
Experience
Requires 710 years experience in systems analysis or related.
Experience in use of MBSE tools such as SysML knowledge in MATLAB/Simulink.
Experience in integrating descriptive modeling tools with other simulation tools.
Additional Job Description:
You will develop verification approaches author and execute verification plans and use formal analysis tools. While leading verification teams you will define the testbench architecture and verification approach. You will be responsible for developing methodologies and defining processes used by verification teams. You will also have the opportunity to lead multidisciplinary teams and learn grow and contribute to a variety of projects. Join us as we develop the next generation of digital and embedded hardware platforms.
- Fluent in System Verilog including SVA
- Familiarity with at least one major industry simulator (Questasim Xcelium VCS)
- Familiarity with at least one IEEE bus standard
- Experience with DDR3/DDR4 Amba Axi protocols
- Firm grasp of constrainedrandom testing and coveragedriven verification
- Experience with formal analysis
- Practice using Python Perl Bash or other scripting languages
- Ability to work in a Linux environment
- Strong analysis and problemsolving skills
- Develop verification and test plans
- Develop UVM Agents for proprietary buses
- Instantiate VIPs for industry standard buses
- Work in both blocklevel/chiplevel UVM testbench environment
- Work with RTL designers to resolve simulation issues
- Implement cover groups according to design requirements
- Work on code and functional coverage closures to achieve 100
- Perform code reviews and to mentor junior engineers in the group
Applicants selected for this position will be required to obtain and maintain a government security clearance.
Connect With Draper for Future Opportunities! If you dont find the right posting in our Career Opportunities you may submit your resume for future consideration.
Job Location City:
CambridgeJob Location State:
MassachusettsJob Location Postal Code:
0Our work is very important to us but so is our life outside of work. Draper supports many programs to improve worklife balance including workplace flexibility employee clubs ranging from photography to yoga health and finance workshops off site social events and discounts to local museums and cultural activities. If this specific job opportunity and the chance to work at a nationally renowned R&D innovation company appeals to you apply now www.draper/careers.
Draper is committed to creating an inclusive environment. We understand the value of inclusivity and its impact on a highperformance culture. All qualified applicants will receive consideration for employment without regard to race color religion sex disability age sexual orientation national origin veteran status or genetic information. Draper is committed to providing access equal opportunity and reasonable accommodation for individuals with disabilities in employment its services programs and activities. To request reasonable accommodation please contact .
Required Experience:
Staff IC
Employment Type
Full-Time
