Analog IC Design Engineer
Analog IC Design Engineer
Employer Active
Job Alert
You will be updated with latest job alerts via email
Share
Job Alert
You will be updated with latest job alerts via email
Job Description
Analog IC Design Engineer
Our client a leader in advanced connectivity solutions is shaping the future of highspeed data communicationpowering innovation across AI data centers 5G infrastructure autonomous vehicles and beyond. As part of their Connectivity Products Group youll help drive the development of nextgeneration direct detect and Coherent DSP solutions enabling 800Gbps 1.6Tbps and higherspeed interconnects.
As an Analog IC Design Engineer youll contribute to cuttingedge analog and mixedsignal circuit design from concept through silicon characterization collaborating with an elite team to push performance and power boundaries across advanced CMOS nodes.
What Youll Do
Design and verify highperformance analog blocks aligned with system and industry specifications.
Collaborate with a team of toptier engineerssupporting and being supported through shared ownership and technical leadership.
Optimize circuits to meet power performance and area (PPA) goals.
Propose and implement design and verification strategies to ensure robust siliconproven circuits.
Guide and review physical layout to reduce parasitics stress and process variability.
Present simulation results for peer review and technical validation.
Document design features testbench setups and key performance indicators.
Support the characterization team to validate postsilicon performance and correlate measurements to simulations.
What Youll Need
MSc or PhD in Electrical Engineering Engineering Science or a related technical field.
5 years of experience in analog IC design preferably with siliconproven results.
Handson experience with advanced CMOS nodes.
Design experience with any of the following blocks: CTLE slicers highspeed ADCs VCOs PIs PLLs bandgaps regulators serializers/deserializers phase detectors or highspeed TX/RX architectures.
Strong understanding of parasiticaware layout and reliability considerations (aging stress EM).
Proficiency with EDA tools for schematic layout and verification workflows.
Solid simulation background including SPICE and behavioral modeling using VerilogA.
Location: Toronto reporting to the Senior Director Connectivity Products Group.
Please reach out to with your resume if youre a fit for the position and interested in learning more.Employment Type
Full Time
