As a senior member of the SOC Verification team you will lead a team of verification engineers and verify new breeds of SoC for advanced perception applications utilizing 4D Lidar. You will architect and develop verification environments for block subsystem and fullchip using stateofart verification techniques and verify complex SoC designs.
What youll be doing:
Lead and drive block subsystems and fullchip verification of advanced ARMbased SOCs.
Architect and build test benches reference models and scoreboards using SystemVerilog and UVMconstrained random methodologies
Define and execute test plan for block subsystem and fullchip using SV/UVM and C/C FW running on the onchip ARM processors
Work in a dynamic and fastpaced startup environment and work closely with a team of passionate engineers to define and enhance the processes methodology and tools to verify complex SoCs.
Work with Architects design and verification and system software teams to define systemlevel verification plans and prove that SOC meets the functional performance and power target defined in the architecture and design specs.
Identify and write functional coverage groups to improve test/stimulus quality
Through coverage analysis to identify verification gaps and achieve 100 coverage closure
Work with the different stakeholders and crossfunctional leads to ensure highquality SoC delivery on time
What youll have:
10 years of experience in design verification and validation of advanced ARM based SOCs
5 years in architecting and building constrained random verification environments reference models scoreboards and directed selfchecking tests using SystemVerilog and UVM methodologies
Deep understanding of ARMbased SOC verification. Writing assembly and C/C diagnostic firmware for embedded ARM processors and debugging in a simulation environment
Working experience and knowledge in AMBA protocols CoreSight Debugger LPDDR Ethernet MIPI and highspeed serdes etc.
Solid programming skills in SystemVerilog UVM C/C assembly Perl/Python.
Proficient in debugging complex SOC or CPU core designs
Excellent verbal and written communication skills
Ability to collaborate deeply with crossfunctional leads and management teams
Ability to deliver results in a very fastmoving environment
Desire to learn & implement groundbreaking new processes and methodology for continuous verification improvement
Nice to haves:
Diagnostics Firmware development and validation
Experience in presilicon validation on emulation platforms such as Cadence Palladium Mentor Veloce Synopsys Zebu
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