Sr Physical Design Engineer PR
Sr Physical Design Engineer PR
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Not Disclosed
Salary Not Disclosed
1 Vacancy
Job Description
Location: San Diego OR Irvine OR San Jose CA (onsite)
Fulltime: Salary Benefits Bonuses or Contractor (corptocorp)
Work Status: US Citizen or US Permanent Resident
Responsibilities:
Perform block level implementation using place and route techniques to meet area/timing and power requirements
Drive clock tree planning and implementation to achieve best energy performance and area
Resolve design and flow issues related to physical design identify potential solutions and drive
Work directly with Synthesis/Timing Team to ensure Design closure
Manage quality deliverables for excellent in physical design
Requirements:
Deep Understanding of all aspects of Physical Design Integration STA and Physical Verification
Hands on experience in blocklevel floorplanning power planning placement clock tree synthesis routing LVS/DRC/ERC timing closure signoff and engineering change orders (ECOs)
Knowledge and skills in optimizing PPA through floorplanning placement and timing constraints useful skew and similar techniques
Experience with the Cadence digital EDA toolset (Innovus / Quantus / Tempus / Conformal)
Ability to use scripting languages to automate process flow
Team player with good interpersonal and communication skills
BSEE with 8 years of experience
Desirable Skills:
MSEE with 5 years of experience
Experience working with communications chips
Ability to be proactive and have a strategic mindset in addition to having tactical problemsolving experience
Familiarity with industry standard interfaces
Required Experience:
Senior IC
Employment Type
Full Time
