Senior RTL Design Engineer remote
Senior RTL Design Engineer remote
Posted on :
07-04-2025
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1 Vacancy
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Job Description
Senior RTL Design Engineer
Remote / work from home
US Citizen or US Permanent Resident
Fulltime/employee Benefits 401k Stock Options
Summary
As Senior RTL Design Engineer you will work in a small talented team of SoC Engineers researching designing and implementing novel methodologies and architectures. You will have the opportunity to contribute to all areas of SoC design verification and implementation. Projects range from integrating third party IPs to designing complex systems.
Responsibilities:
Participate in architectural feasibility studies
Develop microarchitecture specifications based on the SoC requirements
Design implement and integrate complex SoC blocks
Develop blocklevel test cases to deliver fully functional designs
Develop synthesis constraints and resolve timing issues
Resolve Lint CDC and DFT related issues
Identify and resolve RTL and GLS failures at block and chip level
Participate in ECO implementation
Assist with silicon bringup
Required Skills / Experience:
Bachelors degree in Electrical Engineering Computer Engineering or related field
7 years of RTL Design including HVLs and HDLs (SystemVerilog Verilog) and thirdparty IP integration experience
Logic synthesis and static timing analysis
SoC design flow including chiplevel design block/IP design and behavioral modeling
Modeling SoC architectures with FPGAs
Working knowledge of standard bus protocols such as AXI/AMBA/TileLink
Experience with RISCV architecture
Working knowledge of PCIe and DDR
Clock domain crossing methodologies
Scripting languages such as Python Perl Tcl shell etc.
Strong familiarity with EDA tools
Strong problem solving and debugging capabilities
Working knowledge of SoC design with CHISEL is a plus
Asynchronous logic design is a plus
#RTL #RTLDesign #SoC #SoCDesign #Lint #CDC #DFT #GLS #SystemVerilog #Verilog #IP #AXI #AMBA #TileLink #RISCV #CHISEL #LogicDesign
Remote / work from home
US Citizen or US Permanent Resident
Fulltime/employee Benefits 401k Stock Options
Summary
As Senior RTL Design Engineer you will work in a small talented team of SoC Engineers researching designing and implementing novel methodologies and architectures. You will have the opportunity to contribute to all areas of SoC design verification and implementation. Projects range from integrating third party IPs to designing complex systems.
Responsibilities:
Participate in architectural feasibility studies
Develop microarchitecture specifications based on the SoC requirements
Design implement and integrate complex SoC blocks
Develop blocklevel test cases to deliver fully functional designs
Develop synthesis constraints and resolve timing issues
Resolve Lint CDC and DFT related issues
Identify and resolve RTL and GLS failures at block and chip level
Participate in ECO implementation
Assist with silicon bringup
Required Skills / Experience:
Bachelors degree in Electrical Engineering Computer Engineering or related field
7 years of RTL Design including HVLs and HDLs (SystemVerilog Verilog) and thirdparty IP integration experience
Logic synthesis and static timing analysis
SoC design flow including chiplevel design block/IP design and behavioral modeling
Modeling SoC architectures with FPGAs
Working knowledge of standard bus protocols such as AXI/AMBA/TileLink
Experience with RISCV architecture
Working knowledge of PCIe and DDR
Clock domain crossing methodologies
Scripting languages such as Python Perl Tcl shell etc.
Strong familiarity with EDA tools
Strong problem solving and debugging capabilities
Working knowledge of SoC design with CHISEL is a plus
Asynchronous logic design is a plus
#RTL #RTLDesign #SoC #SoCDesign #Lint #CDC #DFT #GLS #SystemVerilog #Verilog #IP #AXI #AMBA #TileLink #RISCV #CHISEL #LogicDesign
Javier Leon
cell
www.LinkedIn/in/JavierLeon (are we connected)
Required Experience:
Senior IC
Employment Type
Full Time
Key Skills
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