Sr Principal Engineer RTL ASIC Design
Sr Principal Engineer RTL ASIC Design
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Job Description
About Marvell
Marvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise cloud and AI automotive and carrier architectures our innovative technology is enabling new possibilities.
At Marvell you can affect the arc of individual lives lift the trajectory of entire industries and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation above and beyond fleeting trends Marvell is a place to thrive learn and lead.
Your Team Your Impact
Data Centre Engineering Business Unit is one of Marvells fastest growing business units. In DCE we focus on helping our customers with their custom designs for cloudbased AI applications as well as customers in the enterprise and carrier markets.What You Can Expect
- Define the sub system architecture microarchitecture and register specification for highly complex SoCs. Drive and participate in specification writeup
- Work closely with system and chip architects to design industrial quality implementations.
- Conduct detailed performance architectural and design requirement reviews with crossfunctional teams IP Vendors and customers
- Implement a specification using RTL coding techniques and best practices
- Work with third party vendors to define customization requirements of third party IPs (controller PHY etc.
- Work with the physical design teams reviewing and providing guidance in floorplanning power analysis synthesis and timing signoff.
- Work with the verification team on presilicon verification tasks such as reviewing the verification test plans coverage analysis fullchip simulation and emulation performance and power analysis and debug
- Help develop and/or evaluate design and verification methodology
What Were Looking For
- Bachelors/Masters degree in Computer Science Electrical Engineering or related fields and 18 years of related professional experience. PhD in Computer Science Electrical Engineering or related fields with 16 years of experience.
- Architect and design SoC subsystems (reset boot power security access control debug CPU DSP AI accelerators).
- Define specifications microarchitecture and use cases with crossfunctional teams.
- Collaborate with hardware firmware and security teams to ensure design efficiency.
- Perform tradeoff analysis (area power performance security HW/SW reusability).
- Work on highspeed interconnects (PCIe CXL DDR) and system caches.
- Strong experience in SoC architecture HW microarchitecture and security.
- Expertise in ARMbased SoC architectures including compute memory management and virtualization.
- Knowledge of high/lowspeed peripherals DDR interconnects QoS and power management.
- Experience in performance analysis simulation modeling and VLSI design flow.
- Proficiency in HDL scripting and digital design.
- Strong communication and collaboration skills for global teams.
Additional Compensation and Benefit Elements
With competitive compensation and great benefits you will enjoy our workstyle within an environment of shared collaboration transparency and inclusivity. Were dedicated to giving our people the tools and resources they need to succeed in doing work that matters and to grow and develop with us. For additional information on what its like to work at Marvell visit our Careers page.
All qualified applicants will receive consideration for employment without regard to race color religion sex national origin sexual orientation gender identity disability or protected veteran status.
#LIKP1Required Experience:
Staff IC
Employment Type
Full-Time
