Sr FPGA Design Engineer
Sr FPGA Design Engineer
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Job Description
Hello
My name is Dharmendra. I just received details on a great job that I believe you would be a great fit for. Please take a look below and share your interest. If not interested I would also appreciate if you can recommend me someone looking for a similar role.
Job Title: Sr. FPGA Design Engineer
Location: Boston M
Duration: Long Term
Interview: WebEx
Job type: Full Time
Must have active security clearance
Will consider anybody with any of these preferred skills or experiences:
Experience with OVM / UVM design verification methodology: bash/csh Perl TCL Python or similar scripting languages; VHDL or similar hardware description languages.
Responsibilities:
Design develop and implement FPGAbased hardware solutions for aerospace applications
Write efficient RTL (Register Transfer Level) code in VHDL/Verilog for FPGA development.
Perform FPGA synthesis simulation and timing analysis to ensure the designs meet performance and timing requirements.
Collaborate with hardware and software teams to integrate FPGA designs with other system components.
Work on boardlevel debugging troubleshooting and validation of FPGA designs in realworld applications.
Develop and run test benches to verify the functionality of the FPGA design.
Optimize FPGA designs for power area and speed.
Create and maintain design documentation including specifications test plans and design reports.
Provide support for design bringup debugging and performance analysis.
Continuously evaluate and incorporate new FPGA technologies and tools into design practices.
Qualifications:
Bachelors or Masters degree in Electrical Engineering Computer Engineering or a related field.
5 years of experience in FPGA design with a strong focus on RTL design and implementation.
Proficiency in VHDL/Verilog for FPGA design.
Experience with FPGA design tools (e.g. Xilinx Vivado Intel Quartus etc. and simulation tools.
Strong knowledge of digital logic timing analysis and FPGA architectures.
Familiarity with hardware description languages (HDLs) and hardware debugging techniques.
Experience with OVM / UVM design verification methodology.
Proficiency in scripting languages such as bash/csh Perl TCL Python or similar.
Experience with FPGA development boards and peripherals.
Understanding of FPGA performance optimization techniques (timing closure resource optimization etc..
Experience with highspeed digital design and signal processing.
Familiarity with embedded systems and software integration.
Active Security Clearance required
Experience with highlevel synthesis (HLS) tools.
Familiarity with version control systems like Git.
Employment Type
Full Time
