drjobs PLLClocking Design Engineer

PLLClocking Design Engineer

Employer Active

1 Vacancy
The job posting is outdated and position may be filled
drjobs

Job Alert

You will be updated with latest job alerts via email
Valid email field required
Send jobs
Send me jobs like this
drjobs

Job Alert

You will be updated with latest job alerts via email

Valid email field required
Send jobs
Job Location drjobs

Austin - USA

Monthly Salary drjobs

Not Disclosed

drjobs

Salary Not Disclosed

Vacancy

1 Vacancy

Job Description

At Apple our products are revolutionizing the way people live across the globe. Within our AnalogMixed/Signal group your role will be crucial in pushing the boundaries of what our technology can achieve. We are dedicated to crafting highquality innovative hard IPs that surpass the ordinary adjusting to the escalating complexity of SOC/PHY designs and multiplying projects within tight production schedules. Our environment thrives on these challenges fueled by a team of exceptional individuals passionate about continual learning and making a substantial impact.If you excel in dynamic settings relish collaborative problemsolving and seek to make a societal impact through your work you might be the ideal candidate for our team. At Apple youll join a culture that encourages you to take ownership of your career supported by colleagues committed to making a difference.

Description

In this role you will leverage your expertise to develop cuttingedge frequency synthesizers for a variety of applications including Compute SoC SerDes and Cellular technologies. Your work will directly contribute to maintaining Apples leadership in innovation and market presence setting new standards in the tech industry.

Minimum Qualifications

  • BSEE with at least 3 years of relevant experience

Key Qualifications

Preferred Qualifications

  • Technical Expertise:Demonstrated proficiency in PLL/FLL and frequency synthesis architecture and circuit design. This includes digital and analog approaches DCO/VCO design both RO and LC FractionalN SSC Spur and Jitter cancellation techniques ..etc
  • Good knowledge of band gaps bias circuits opamps LDOs feedback and compensation techniques.
  • Clocking Mastery:Deep understanding of clocking fundamentals with a solid grasp of phase noise jitter analysis budgeting and feedback loop dynamics.
  • Simulation and Modeling:Skilled in developing System Verilog models and performing behavioral simulations to explore new architectural performance and impact on loop dynamics. Ability to design/debug RTL is a plus.
  • Attention to Detail:Exceptional focus on understanding the problems at hand and their systemic impacts ensuring thoroughness in problemsolving.
  • Innovation and Learning:A history of innovation and selfdirected learning with demonstrated leadership skills and a growth mindset.
  • Team Collaboration:Outstanding teamwork capabilities paired with strong productivity and scripting skills ideally with experience in using industrystandard design tools.

Education & Experience

Additional Requirements

  • Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race color religion sex sexual orientation gender identity national origin disability Veteran status or other legally protected characteristics. Learn more about your EEO rights as an applicant.

Employment Type

Full-Time

About Company

0-50 employees
Report This Job
Disclaimer: Drjobpro.com is only a platform that connects job seekers and employers. Applicants are advised to conduct their own independent research into the credentials of the prospective employer.We always make certain that our clients do not endorse any request for money payments, thus we advise against sharing any personal or bank-related information with any third party. If you suspect fraud or malpractice, please contact us via contact us page.