ASIC DeveloperConsultant
ASIC DeveloperConsultant
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Not Disclosed
Salary Not Disclosed
1 Vacancy
Job Description
KEY RESPONSIBILITIES:
- Developing block and SoC timing constraints full chip STA setup and signoff of multicorner multivoltage designs.
- Owning timing flow and to meet SoC timing requirements including timing budgeting repeater planning constraints/exceptions generation and management
- Engaging closely with block and SoC design teams to understand the design requirements STA constraints and convergence challenges.
- Engaging closely with physical implementation teams to ensure designs meet QoR and debug timing failures
PREFERRED EXPERIENCE:
- 10 years of professional experience in ASIC implementation and CAD methodology preferably experience closing timing of high performance designs.
- Demonstrated ability in areas of ASIC STA constraints generation timing analysis timing convergence and ECOs at both block and full chip level is a must
- Implementation experience and knowledge handling multivoltage design is expected. STA closure of low power and multipower mode designs is an added advantage.
- Expertise in industry standard ASIC EDA tools including Synopsys DC and Primetime is required.
- Proficiency in scripting language such as TCL Perl and/or Python
- Experience developing scripts to automate design flow analysis
- Handson experience with Physical Design implementation is a plus
- Strong communication skills ability to multitask across projects and work with geographically spreadout teams
Employment Type
Full Time
