CAD Gate-level 3DIC EMIR Engineer
CAD Gate-level 3DIC EMIR Engineer
Posted on :
17-03-2025
Employer Active
1 Vacancy
The job posting is outdated and position may be filled
Job Alert
You will be updated with latest job alerts via emailValid email field required
Send jobs
Share
Send me jobs like this
Job Alert
You will be updated with latest job alerts via emailValid email field required
Send jobs
Job Description
Imagine what you could do here! At Apple new ideas have a way of becoming phenomenal products very quickly. Do you want to bring passion and dedication to your job Theres no telling what you could accomplish at Apple. The people who work here have reinvented entire industries with Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices we continue to strengthen our commitment to leave the world better than we found it! As a key member of our bestinclass CAD Group you will be part of building innovative designs. We will apply your handson experience in power EM/IR analysis to develop define and refine the methodologies and flows for gatelevel as well as transistor level designs. Major tasks will include functional static / dynamic IR analysis scan mode IVD analysis package and interposer model handling 3DIC and multi die analysis power EM analysis SigEM power switch modeling design abstract and reuse for EM/IR purposes IP / SoC level EMIR signoff / ECO and much more. Are you ready to join some of the worlds leading engineers and help us deliver the next generation of groundbreaking Apple products
Description
In this highly visible role your primary responsibilities will include: Development of custom EM/IR solutions which scale with accuracy and capacity challenges. Streamline and automate EM/IR flow with ownership of the entire flow. Support and collaborate with design groups (Physicaldesign and integration Circuitdesign / Power / Package & System / Technology) on their EM/IR requirements for various post layout flows. Work side by side with EDA vendors and foundries for tool qualification debug and enhancement.
Minimum Qualifications
- Experience in EDA Tool CAD flow and EMIR methodology.
- Experience in at least one of Tcl Python or Perl scripting languages.
- Experience in some of the analysis involved in EMIR extraction timing noise simulation physical design and verification
- Minimum requirement of BS 10 years of relevant industry experience
Key Qualifications
Preferred Qualifications
- Ability to coordinate and drive initiatives with little to no oversight.
- Excellent communication and presentation skills.
- Hands on knowledge of industry leading EMIR tools e.g. Voltus VoltusFi RedHawkSC Totem.
- Experience in development of large scale software in multi user multi site environment.
- Hands on experience with analysis optimization and debugging of IR/IVD/Electromigration issues on high performance large scale designs and silicons.
Education & Experience
Additional Requirements
Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race color religion sex sexual orientation gender identity national origin disability Veteran status or other legally protected characteristics. Learn more about your EEO rights as an applicant.
Employment Type
Full Time
Report This Job
Disclaimer: Drjobpro.com is only a platform that connects job seekers and employers. Applicants are advised to conduct their own independent research into the credentials of the prospective employer.We always make certain that our clients do not endorse any request for money payments, thus we advise against sharing any personal or bank-related information with any third party. If you suspect fraud or malpractice, please contact us via contact us page.
