Internship Digital Design FM

NXPs Industrial & IoT Edge solutions range from the smallest MCUs to very high-performance processors to provide real-time insights and efficient automation when performance matters most. NXPs advanced portfolio of edge processing solutions lets developers explore their most innovative ideas with confidence enabling applications across the autonomous home industrial automation and personal electronics.

NXP is building new teams in Catania to create high impact micro-controllers (MCU) as part of NXPs intelligent AI at the Edge. This team will includea widerange of engineering talent from analog to SOC digital design.

We are looking for an intern to support digital design activities within our growing Catania team with hands-on project exposure mentoring from experienced engineers and potential university thesis collaboration.

YourResponsibilities

• Support the development of digital sub-circuits related to complex System-on-Chip (SOC) designs based on pre-defined specifications gaining hands-on exposure to RTL coding (Verilog/SystemVerilog) synthesis static timing analysis (STA) formal verification power analysis and design for testability (DFT) concepts.

• Collaborate with analog mixed-signal digital and software teams to understand interfaces system performance considerations and integration practices.

• Follow established design methodologies and guidance from senior engineers to contribute to schedule commitments and quality objectives.

• Assist with design verification activities using simulation tools and structured debug methodologies under the supervision of experienced engineers.

• Contribute to lab validation and debug preparation activities learning how design issues are identified analyzed and resolved to support product quality.

• Prepare and maintain clear technical documentation including design notes verification summaries and review material.

• Learn industry trends emerging technologies and best practices in digital IC design methodology through project work and team mentoring.

YourProfile

• Currently pursuing a Masters degree in Electrical Engineering Electronics Engineering Computer Engineering or a related field.

• Basic knowledge of Verilog/SystemVerilog for RTL design and/or verification gained through coursework academic projects or previous internships.

• Familiarity with digital design flows and EDA tools is a plus including RTL coding synthesis STA or formal verification.

• Understanding of basic digital design principles with interest in areas such as clock domain crossing (CDC) low-power design and SoC integration.

• Exposure to scripting languages such as Python Perl or Tcl for automation is considered a plus.

• Attitude to problem-solving attention to details and ability to work in team oriented environment.

• Strong communication and interpersonal skills with the ability to work effectively in a collaborative team environment.

• Curiosity willingness to learn and motivation to grow technical skills in a collaborative engineering environment.

NXP is committed to equal pay for equal work and work of equal value and applies fair consistent and transparent remuneration practices.

More information about NXP in Italy...