Application Engineer II Signal Integrity & Power Integrity

Cadence Design Systems Inc. is looking for a motivated Application Engineer II: Physical Design - Synthesis and Digital Implementation to work with us in Belo Horizonte Brazil.

At Cadence we hire and develop leaders and innovators who want to impact the world of technology. Cadence has been nominated as a Great Place to Work globally and in Brazil and is also a Fortune 100 Best Companies to Work For.

As an Application Engineer you will be part of Global Customer Success (GCS) team in Belo Horizonte Brazil. The GCS team works with Digital Analog Verification Systems tools. To understand more on our tools & flows you can visit

Job Responsibilities

• Support customers in the deployment and adoption of Cadence Signal Integrity Power Integrity and Board Design solutions; Assist customers in debugging and optimizing designs involving System Design Board Package Heterogenous integrated 3D-IC High-Speed Interfaces technologies using either tool capabilities scripting techniques or new methodologies.

• Drive methodology and solution-oriented discussions with key stakeholders. Educate and drive adoption of new technology across customers.

• Collaborate with R&D field teams and product specialists to reproduce issues test solutions and improve tool usability.

• Develop technical documentation examples and knowledge content to improve customer self-service and tool adoption. Document findings methodologies and best practices to improve customer self-service and internal knowledge sharing.

• Build relation with worldwide teams to collaborate on needs. Mentor junior engineers and contribute to the development of technical expertise within the team.

Requirements:

• Bachelors or Masters degree in Electrical Engineering Electronics Engineering or related fields.

• Experience in System level Signal Integrity and Power Integrity EM field solver technologies. Thermal is added advantage. Good analog and digital system design fundamentals.

• Excellent working knowledge and terminologies of Serial and parallel high-speed interfaces. Well-versed in the design challenges of SI and PI for high-speed interconnects. Understanding of serial interface Equalization channel simulation and measurement.

• Capabilities to analyze the 2D/3D Signal waveforms Eye Diagram Eye Density and Bathtub curve.

• Experience in extracting and analyzing S-parameter results with understanding of Insertion loss Return Loss TDR RLGC parameters.

• Understanding/experience in EMI-EMC simulations.

• Basic experience with EDA environments and Linux-based workflows.

• Strong analytical debugging and problem-solving skills.

• Strong english written verbal and presentation skills.

• Ability to establish a close working relationship with both customer and internal stakeholders. Mentorship expertise is nice to have.

Additional Job Details:

• Employment category: CLT.

• Employment term: 40 hours/week.

• Competitive benefits.

• Location: Av Contorno 5800 Belo Horizonte Minas Gerais Brazil.

About Cadence Design Systems:

Cadence is the only company that provides the expertise and tools IP and hardware required for the entire electronics design chain from chip design to chip packaging to boards and to systems. We enable electronic systems and semiconductor companies to create innovative products that transform the way people live work and play. Our products are used in mobile consumer cloud datacenter automotive aerospace IoT industrial and other market segments. For more information access .