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Role: ASIC & FPGA Design EngineerClient: Defense-AerospaceHourly Rate: up to $100/hr (W2 non-benefited) Length: 6-months Location:Houston TXClearance: Candidate must have the Ability to Obtain Secret Clearance. Not needed to start.Description:Work with low SWaP radiation-hardened space-rated devices...

DESE is seeking a Systems Test Scenario Designer to support the Rapid Scenario Prototyping (RaSP) Lab. The Scenario Design team uses their knowledge of the Missile Defense System (MDS) sensors weapon systems and element interoperability to construct test case scenarios for system of system tests to...

Please Note:1. If you are a first time user please create your candidatelogin account before you apply for a job. (Click Sign In > Create Account)2. If you already have a Candidate Account please Sign-In before you apply.Job Description:The ASIC Product Division in Broadcom is a leading supplier of...

DESE is seeking a Systems Test Scenario Designer to support the Rapid Scenario Prototyping (RaSP) Lab. The Scenario Design team uses their knowledge of the Missile Defense System (MDS) sensors weapon systems and element interoperability to construct test case scenarios for system of system tests to...

Analog Architect and Design EngineerResponsibilities: Clock generation and distribution (VCOs PLL clock distribution etc) Design of custom passive components from concept to silicon implementation Fundamental analog blocks (bandgap references LDOs temp sensors etc) High-speed analog circuit design s...

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible with the ultimate goal ofenabling human life on Mars.HARNESSING DESIGN ENGI...

PLL Architect and Design EngineerResponsibilities: Address challenges in advanced node technologies such as self-heating electromigration voltage-controlled oscillator (VCO) linearization and device-level noise optimization Architect design and simulate analog/mixed-signal PLL building blocks (VCOs...

RFA Engineering () is an engineering service provider dedicated to delivering our clients with timely engineering support and expertise. We are seeking an experienced candidate to become an integral part of our engineering team. The selected candidate will work with an experienced engineering staff...

Analog Architect and Design EngineerResponsibilities: Clock generation and distribution (VCOs PLL clock distribution etc) Design of custom passive components from concept to silicon implementation Fundamental analog blocks (bandgap references LDOs temp sensors etc) High-speed analog circuit design s...

Analog Architect and Design EngineerResponsibilities: Clock generation and distribution (VCOs PLL clock distribution etc) Design of custom passive components from concept to silicon implementation Fundamental analog blocks (bandgap references LDOs temp sensors etc) High-speed analog circuit design s...

Looking for an opportunity to make an impactAt Leidos we deliver innovative solutions through the efforts of our diverse and talented people who are dedicated to our customers success. We empower our teams contribute to our communities and operate sustainably. Everything we do is built on a commitme...

Analog Architect and Design EngineerResponsibilities: Clock generation and distribution (VCOs PLL clock distribution etc) Design of custom passive components from concept to silicon implementation Fundamental analog blocks (bandgap references LDOs temp sensors etc) High-speed analog circuit design s...

PLL Architect and Design EngineerResponsibilities: Address challenges in advanced node technologies such as self-heating electromigration voltage-controlled oscillator (VCO) linearization and device-level noise optimization Architect design and simulate analog/mixed-signal PLL building blocks (VCOs...

PLL Architect and Design EngineerResponsibilities: Address challenges in advanced node technologies such as self-heating electromigration voltage-controlled oscillator (VCO) linearization and device-level noise optimization Architect design and simulate analog/mixed-signal PLL building blocks (VCOs...

PLL Architect and Design EngineerResponsibilities: Address challenges in advanced node technologies such as self-heating electromigration voltage-controlled oscillator (VCO) linearization and device-level noise optimization Architect design and simulate analog/mixed-signal PLL building blocks (VCOs...

Analog Architect and Design EngineerResponsibilities: Clock generation and distribution (VCOs PLL clock distribution etc) Design of custom passive components from concept to silicon implementation Fundamental analog blocks (bandgap references LDOs temp sensors etc) High-speed analog circuit design s...

Analog Architect and Design EngineerResponsibilities: Clock generation and distribution (VCOs PLL clock distribution etc) Design of custom passive components from concept to silicon implementation Fundamental analog blocks (bandgap references LDOs temp sensors etc) High-speed analog circuit design s...

PLL Architect and Design EngineerResponsibilities: Address challenges in advanced node technologies such as self-heating electromigration voltage-controlled oscillator (VCO) linearization and device-level noise optimization Architect design and simulate analog/mixed-signal PLL building blocks (VCOs...

PLL Architect and Design EngineerResponsibilities: Address challenges in advanced node technologies such as self-heating electromigration voltage-controlled oscillator (VCO) linearization and device-level noise optimization Architect design and simulate analog/mixed-signal PLL building blocks (VCOs...

Company OverviewKLA is a global leader in diversified electronics for the semiconductor manufacturing ecosystem. Virtually every electronic device in the world is produced using our technologies. No laptop smartphone wearable device voice-controlled gadget flexible screen VR device or smart car woul...