NXP Semiconductors Romania

As Senior Data Engineer you will assist in designing developing and maintaining integration solutions that connect various business application and systems. With other words you will ensure maximum effectiveness and quality of implementing IT integration solutions for NXP. You are man

As Senior Data Engineer you will assist in designing developing and maintaining integration solutions that connect various business application and systems. With other words you will ensure maximum effectiveness and quality of implementing IT integration solutions for NXP. You are man

Responsibilities: To define the FPGA development plan according to the requirement from design or software teamPorting internal ASIC design to FPGA platformTo setup FPGA simulation environment Co work with validation team to define pre-silicon validation test plan and do resource esti

Responsibilities: To define the FPGA development plan according to the requirement from design or software teamPorting internal ASIC design to FPGA platformTo setup FPGA simulation environment Co work with validation team to define pre-silicon validation test plan and do resource esti

Responsibilities:The Analog Circuit Development Engineer / Architect is responsible for defining and realizing Analog functions on IPs Subsystem or IC level.The individual is responsible for design verification and evaluation of those.The individual is accountable for designing accord

Responsibilities:The Analog Circuit Development Engineer / Architect is responsible for defining and realizing Analog functions on IPs Subsystem or IC level.The individual is responsible for design verification and evaluation of those.The individual is accountable for designing accord

Responsibilities:Setup and maintain DFT flow familiar with script language.Be responsible for definition and implementation different schemes of DFT aspects: including scan/MBIST/JTAG insertion ATPG generation test patterns generation.Experience RTL/netlist simulation good debug capab

Responsibilities:Setup and maintain DFT flow familiar with script language.Be responsible for definition and implementation different schemes of DFT aspects: including scan/MBIST/JTAG insertion ATPG generation test patterns generation.Experience RTL/netlist simulation good debug capab

Responsibilities:Sample reception / collection / distribution / weekly shipment system implementationWeekly GC FQE individual EEN influx data monitor and releaseMonthly GC overall non GC initiation and GC FQE individual EEN reduction data collection Export control register for all CQC

Responsibilities:Sample reception / collection / distribution / weekly shipment system implementationWeekly GC FQE individual EEN influx data monitor and releaseMonthly GC overall non GC initiation and GC FQE individual EEN reduction data collection Export control register for all CQC

Provide support for Reliability analysis including but not limited to:1. Environmental Stressing (Temp cycle UHAST HTSL MSL)2. Physical Analysis (CSAM Solderability)3. Support RAP execution.4. Incoming & Outgoing sample trackingJob Qualification Complete SPM result 5 credit result or

Provide support for Reliability analysis including but not limited to:1. Environmental Stressing (Temp cycle UHAST HTSL MSL)2. Physical Analysis (CSAM Solderability)3. Support RAP execution.4. Incoming & Outgoing sample trackingJob Qualification Complete SPM result 5 credit result or

Prepare IFRS and/or local GAAP financial statements and notes management reports and other related documents required for local statutory reporting for a group of countries under your responsibility in Finance Center of Excellence (FCOE).Identify calculate and post all necessary GAAP

Prepare IFRS and/or local GAAP financial statements and notes management reports and other related documents required for local statutory reporting for a group of countries under your responsibility in Finance Center of Excellence (FCOE).Identify calculate and post all necessary GAAP