Employer Active
- USA
Not Disclosed
Salary Not Disclosed
1 Vacancy
Perform presilicon validation for customer flagship silicon Liaise with design teams Communicate and coordinate with offshore teams Be the main interface for the customer
EIS : ASIC Frontend Modeling RTL design and Implementation
810
PCIe (Gen 5) and NVMe experience SV and UVM
PCIe (Gen 5) and NVMe experience SV and UVM
Full Time