Firmware Engineer

As a Firmware Engineer you will be part of a team of experts in Hardware FPGA and Embedded Software engineering responsible for the development of highquality systems.

Projects we carry out are diverse and often involve image/video processing implementation of (deep learning) algorithms multithreading microcontroller programming realtime development BSP (board support package) development ROS and/or wireless communication.

High bandwidth solution for photonic encryption

Extremely high bandwidth interface solution for photonics applied to fully homomorphic encryption. Seamless cloud encryption processing solution for safe and secure data exchange using state of the art technology.

• High bandwidth multiADC and multiDAC signal processing
• Translating complex mathematics into fast logic functionality
• Optimization of FPGA logic mapping to match limited available resources

Fast analog interfaces between digital logic and photonic circuits using amongst others stateoftheart RFSOC technology of AMD. Synthesis of complex mathematical models into RTL using highlevelsynthesis (HLS) techniques.

AI & mathmodelling

We designed and developed an autonomous observation system where with multiple cameras a full 360 degree view was created.

Neural network implementations using Tensor Flow or PyTorch/edge and cloud solutions using TPU DPU and GPU/ implementation of research level algorithms/acceleration of algorithms on multicore processor architectures.

Robotics & autonomous operation

Our solutions enable unmanned vehicle control : using Simulink and Python we model the complete functional behaviour of a system.

AGV (Automatic Guided Vehicle) redesign

AMD/Xilinx UAV & Robotics Platform (URP)

Individual plant handler for automatic transplanting machine

Regulatory compliance development e.g. meeting ISO 36914 safety regulation modelbased design with code generation unmanned vehicle control using ROS (Robotic Operating System) and BalenaOS.

Worlds most advanced radio telescopes

Central Signal Processor (CSPLow) integration project for centrally correlating and processing thousands of digitized astronomical signals from the SKALow radio telescope receivers into science data.

• High bandwidth data communication
• Complex combination of hardware firmware and software
• Correlation and processing of signals into detailed science data

Data communication and distribution within a typical data center context. Use of stateoftheart AMDXilinx Alveo processing cards carrying highend FPGA devices for astronomic data processing. Combining multidisciplinary system development skills for integration validation configuration and testing against requirements.

Tasks

• Design implementation and verification of subsystems modules and components;
• Create complex HDL designs and work with large FPGAs like Zynq Ultrascale and Virtex Ultrascale;
• Determine how data and algorithms are processed and mapped on the FPGA hardware;
• Ensure that timing and resource constraints are met;
• Work on pin placement together with hardware engineers;
• Create modules and subcomponents with VHDL and HLS and simulate to ensure your design is working as to be expected;
• Write high quality and structured embedded software;
• Sparring partner for peers and stakeholders in and outside of the team;
• Participate in meetings (standup sprint planning retrospective design/architectural sessions) and sharing your thoughts and ideas;
• Code review and coaching of (junior) engineers.

Requirements

In the embedded systems that we develop memory management and performance optimization are essential.

In our tech stack we use tools such as VHDL Vivado HLS QuestaSim Petalinux UVM Yocto and GIT.

We are one of the few selected companies worldwide to have a Premier Adaptive Computing Partnership with AMD allowing us to adopt and apply new AMD FPGA technologies in an early stage.