Requirement is for NOC Design Verification which includes but not limited to Design verification with low power intent/upf uvm tb collaterals coding test/sequence development regressions/debugs coverage coding/analysis delivering key milestones as part of project executions.
1. Hands on experience in IP/Block level verification.
2. Hands on experience in Low Power Verification/UPF.
3. Experience in Clocking/Boot/Reset Flows.
4. Experience in System Verilog and UVM is a must.
5. Experience in ARM Protocols AXI AHB and CHI.
6. Familiarity with scripting languages like Perl Python.
Required Education: MTech/MS in Electronics
Key Words: SV UVM UPF ARM
Roles & Responsibilities:
1. HW Design Verification role.
2. Responsibility will be to own an IP block verification which involves but not limited to
a. Test/Sequence/constraints coding test bench components coding assertions/checkers and coverage(functional code) closure.
b. Run simulations/regressions/cron debug and analysis.
axi,ip,clocking,boot,universal verification methodology (uvm),design,scripting languages,arm protocols,components,design verification,closure,upf,python,system verilog,uvm,code,assertions,low power verification