ASIC Verification

This is a remote position.

Are you looking for the next step within ASIC verification We are currently looking for ASIC verifiers to help our customers in the telecom sector. You will be involved in new and existing ASIC projects working in teams. The team is currently working on a mix of IP design/verification and different levels of SubSys integration/verification.

Requirements

• 3 years or more experience from ASIC verification (we are looking for several experience levels but 3 years are minimum)
  
• We are looking for a broad scale of experience but you should have been working with UVM for at least one year
  
• Good command of UVM verification and SystemVerilog
  
• Used to work with complex ASIC and/or large FPGA design
  
• Experience with IP block verification
  
• Multiclock domains
  
• RTL within Verilog VHDL and/or SystemVerilog
  
• Good English skills in both speech and writing
  

Meritorious if you have:

• Test bench structuring and design
  
• Leadership qualities
  
• RTL design knowledge
  
• Scripting skills
  
• Lab experience
  
• Telecommunication