Senior Digital Design Enginner

NXP Caen is a development center for integrated circuits responsible for the various phases of the making of System On Chips. Our team focusses on products for automotive market.

Job Responsibility:as a digital designer you will join an highly experience team. Your key responsibilities will be

Develop and implement digital logic designs for complex System-on-Chips (SoCs) and IP blocks adhering to architectural specifications and performance requirements.

Perform RTL coding using industry-standard hardware description languages (Verilog/SystemVerilog).
Conduct design verification activities including testbench development simulation and debugging to ensure functional correctness and coverage.
Collaborate with architects analog designers and software teams to define interfaces and integrate digital blocks.
Participate in synthesis static timing analysis (STA) and formal verification to meet timing area and power targets.
Contribute to design for testability (DFT) implementation and verification.
Generate comprehensive design documentation and participate in design reviews.
Troubleshoot and resolve design issues throughout the development lifecycle.
Stay updated with the latest industry trends tools and methodologies in digital design.

Job Qualification:

Masters degree in Electrical Engineering Computer Engineering or a related field.
Proven experience in digital ASIC/SoC design with a strong understanding of the complete design flow.
Proficiency in Verilog or SystemVerilog for RTL coding.
Experience with industry-standard EDA tools for simulation synthesis STA and formal verification.
Solid understanding of digital design principles including clocking reset and low-power techniques.
Familiarity with scripting languages (e.g. Python Perl Tcl) is a plus.
Knowledge of various communication protocols (e.g. I2C SPI UART PCIe Ethernet) is highly desirable.
Strong analytical and problem-solving skills.
Excellent communication and teamwork abilities.
Fluency in English (written and spoken) is required.

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