IC Layout Manager (AnalogMixed Signal)
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Job Location:
Richardson, TX - USA
Monthly Salary:
Not Disclosed
Posted on:
11 hours ago
Vacancies:
1 Vacancy
Job Summary
About IC Enable
For over 20 years IC Enable has delivered high-reliability design IP IC products and platform solutions to customers ranging from fast-moving startups to Fortune 50 companies. Our work spans mixed-signal and digital IC design with deep expertise in full-custom ASIC/SoC development across semiconductor medical and defense applicationsoften in some of the industrys most demanding process nodes and use cases. Were growingand looking for a senior layout / mask design leader who can own critical pieces of complex silicon development and raise the bar for execution across our team.
At IC Enable we approach every challenge with a startup mindsetnimble relentless and unwilling to accept limits. No task is too complex or too ambitious; we take ownership solve hard problems and push forward as we continue building something bigger than ourselves.
The Role
As a Mixed-Signal and Analog IC Layout Manager you will take ownership of chip-level layout execution and verification for high-performance full-custom ICs. This is a hands-on leadership role: youll drive layout quality guide best practices and collaborate closely with design verification and customer teams to deliver first-pass success on challenging designs.
As a Mixed-Signal and Analog IC Layout Manager you will take ownership of chip-level layout execution and verification for high-performance full-custom ICs. This is a hands-on leadership role: youll drive layout quality guide best practices and collaborate closely with design verification and customer teams to deliver first-pass success on challenging designs.
Location:Richardson TX (Hybrid: 3 days onsite)
What Youll Do
- Lead chip-level layout integration across analog digital and IP blocks
- Own full-chip physical verification: DRC LVS EM/IR parasitic extraction and density compliance
- Drive layout quality consistency and adherence to foundry requirements
- Collaborate with cross-functional teams (design CAD verification) across global locations
- Review and interpret layout specifications to ensure accuracy and performance alignment
- Mentor junior layout engineers and contribute to continuous improvement of layout methodologies
What You Bring
- 10 years of hands-on IC layout experience with significant exposure to mixed-signal designs
- Proven track record delivering complex full-custom chips to tape-out
- Deep expertise with industry-standard tools: Cadence Virtuoso or Synopsys Custom Compiler and physical verification tools such as Calibre PVS or IC Validator
- Strong experience with LVS DRC and chip-level verification flows
- Solid understanding of semiconductor manufacturing processes and design rules
- High attention to detail and ability to work effectively under tight timelines
- Strong communication skills with experience working directly with internal teams and external customers
Education
- Bachelors degree in Electrical Engineering or equivalent experience (Associate degree with significant industry experience considered)
Why IC Enable
We hire people who arehumble driven and highly capableand give them the opportunity to work on technically challenging meaningful designs. Youll be part of a team that values ownership precision and continuous growth.
We hire people who arehumble driven and highly capableand give them the opportunity to work on technically challenging meaningful designs. Youll be part of a team that values ownership precision and continuous growth.
Benefits include:
- Medical Dental Vision and supplemental coverage
- 401(k) with company match
- Collaborative engineering-focused culture
Equal Opportunity Employer
IC Enable is committed to building a diverse and inclusive team.
IC Enable is committed to building a diverse and inclusive team.
Required Experience:
Manager
About Company
Experience You Can Trust. Serving multiple high-tech industries, IC Enable delivers precision quality integrated circuit design projects with first-past success.
