Staff Digital Design Engineer

Join Kyocera International Inc.
Were hiring a Staff Digital Design Engineerat our San Diego CA!

Salary Range: $139000 - 232182 annually
(Final offer based on experience education skills and market factors)

Why Kyocera
With nearly 80000 employees worldwide Kyocera is a global leader in advanced ceramic technologies used in aerospace automotive medical and semiconductor industries. Our materials power everything from smartphones to space shuttles and were just getting started.

What Makes Us Stand Out
We dont just offer jobs we offer careers with purpose stability and growth. Heres what you can expect:

Generous Time Off

• 3 weeks of vacation to start (120 hours/year)
• 10 paid holidays annually

Financial Wellness

• Competitive pay
• 401(k) with company match
• Employer-paid pension plan

Comprehensive Health Coverage

• Medical dental and vision insurance
• Life insurance
• Flexible Spending Account (FSA)
• Employee Assistance Program (EAP)

Investing in You

• Tuition reimbursement
• Paid time off to volunteer
• Flexible schedules

Work-Life Balance & Culture

• Onsite gyms walking tracks and employee gardens at larger locations
• Long-tenured team (many with 30 years of service!)
• Inclusive and diverse workforce
• A company philosophy rooted in doing the right thing as a human being

Our Philosophy
Kyoceras culture is deeply inspired by our founder Dr. Kazuo Inamori. His values guide our decisions and shape our workplace. Learn more about our guiding principles here:

Kyocera Values

Ready to Make a Difference
Apply today and become part of a team thats shaping the future one innovation at a time.

RFE5682 Staff Digital Design Engineer

Job Description

Exempt:Yes
Safety Sensitive:No

GENERAL DESCRIPTION OF POSITION
The Staff Digital Design Engineer will contribute to the development of advanced phased array antenna modules and high-performance communication systems. This role combines system-level digital design involvement of Phase Array Antenna Modules with hands-on digital ASIC/SoC development including RTL design verification subsystem integration and silicon implementation support.

Have a strong background in digital design and SoC development along with an interest in working across system firmware and physical design domains.
ESSENTIAL DUTIES AND RESPONSIBILITIES

1. Design and implement digital subsystems for phased array and communication system applications
2. Develop high-qualityRTL (SystemVerilog)for control and data path logic
3. Participate insystem architecture and partitioning collaborating with RF firmware and system teams
4. Integrateprocessor-based subsystems (e.g. RISC-V)into complex SoC designs
5. Collaborate with firmware teams supportingembedded software development (C)
6. Implement and support interfaces such as:
1. SPI / QSPI
2. High-speed serial interfaces (e.g. JESD204B/C or similar)
7. Support verification activities and contribute to adoption ofUVM and/or formal methodologies
8. Work closely with physical design teams to:
1. Analyze and resolve timing issues
2. Support synthesis and place-and-route flows
3. Develop and implement engineering change orders (ECOs)
9. Participate in system bring-up validation and debug

Perform any other related duties as required or assigned.

QUALIFICATIONS

RTL design using SystemVerilog (or Verilog)

Simulation debugging and verification workflows

Experience with SoC integration including processor subsystems preferably RISC-V

Familiarity with embedded software interaction including C programming

Experience with:

Timing analysis and closure

Synthesis and backend design collaboration

ECO generation and implementation

Working knowledge of common hardware interfaces (SPI QSPI high-speed serial links)

EDUCATION AND EXPERIENCE
Bachelors or Masters degree in Electrical Engineering or related field

6 years of experience in digital ASIC/SoC design

ADDITIONAL SKILLS

Strong problem-solving and debugging skills

Ability to work effectively in cross-functional teams

Clear communication and documentation skills

Interest in both system-level and implementation-level design challenges

PHYSICAL ACTIVITIES
Not indicated.

ENVIRONMENTAL CONDITIONS
There are no harmful environmental conditions that are present for this position.
The noise level in the work environment is not indicated.

ADDITIONAL INFORMATION
The above statements are intended to describe the work being performed by people assigned to this job. They are not intended to be an exhaustive list of all responsibilities duties and skills required. The duties and responsibilities of this position are subject to change and other duties may be assigned or removed at any time. This position may require exposure to information subject to US Export Control regulations i.e.: the International Traffic and Arms Regulations (ITAR) or Export Administration Regulations (EAR). All applicants must be US persons within the meaning of US regulations.

Kyocera International Inc. values diversity in its workforce and is proud to be an AAP/EEO employer. All qualified applicants will receive consideration for employment without regard to race sex color religion sexual orientation gender identity national origin protected veteran status or on the basis of disability.

If you are an individual with a disability and require a reasonable accommodation to complete any part of the application process or are limited in the ability or unable to access or use this online application process and need an alternative method for applying you may contact Kyocera International Inc. Human Resources team directly.
Reasonable accommodations may be made to enable individuals with disabilities to perform essential functions.

Required Experience:

Staff IC