FPGA Design Engineer – Adaptive Compute & Communication

Cortex Consultants LLC

Job Location:

Dallas, IA - USA

Monthly Salary: Not Disclosed

Posted on: Yesterday

Vacancies: 1 Vacancy

Job Summary

Job Description: FPGA Design Engineer Adaptive Compute &; Communication

Role Overview
We are seeking an FPGA Design Engineer to design and develop high-performance
scalable FPGA-based solutions for next-generation adaptive compute and
communication platforms.
The role involves RTL design FPGA implementation validation and optimization for
applications in AI acceleration high-speed networking and embedded compute
systems.

Key Responsibilities
1. RTL Design & FPGA Development
Design and implement RTL (Verilog/SystemVerilog/VHDL) for FPGA platforms
Develop micro-architecture and functional specifications
Work on modules such as:
o Data processing pipelines
o High-speed interfaces
o Control and communication logic

2. FPGA Implementation
Perform:
o Synthesis place & route and timing closure
Optimize for:
o Performance area and power
Work with FPGA tools like:
o Xilinx Vivado / AMD tools Intel Quartus

3. High-Speed Interface Design
Design and integrate interfaces such as:
o PCIe DDR Ethernet JESD204 MIPI
Handle:
o Clocking architecture
o Timing constraints and CDC

4. Verification & Debug
Perform:
o RTL simulation and debugging
o Functional verification support
Debug using:
o On-chip tools (ILA SignalTap)
o Lab equipment (oscilloscope logic analyzer)

5. System Integration
Integrate FPGA designs with:
o SoCs processors and external peripherals
Work on:
o Hardware-software co-design
o Embedded Linux / RTOS integration

6. Cross-Functional Collaboration
Collaborate with:
o Hardware PCB and RF teams
o Software/firmware teams
Support:
o Board bring-up and system validation

Required Skills & Qualifications
Education
/ in Electronics / Electrical / VLSI / Embedded Systems
Experience
3 10 years in FPGA design and development

Technical Skills
Strong expertise in:
o Verilog / SystemVerilog / VHDL

o Digital design fundamentals (FSMs pipelining timing analysis)
Experience with:
o FPGA tools (Vivado Quartus)
o Synthesis and timing closure
Good understanding of:
o High-speed interfaces (PCIe DDR Ethernet)
o Clock domain crossing (CDC)

Preferred Skills
Experience in:
o Adaptive Compute platforms (AMD/Xilinx FPGAs)
Exposure to:
o AI/ML acceleration networking or telecom systems
Knowledge of:
o Embedded systems and Linux drivers
o HLS (High-Level Synthesis) tools

Behavioral Competencies
Strong debugging and analytical skills
Ability to work in cross-functional teams
Ownership and accountability
Effective communication skills

Job Description: FPGA Design Engineer Adaptive Compute &; Communication Role Overview We are seeking an FPGA Design Engineer to design and develop high-performance scalable FPGA-based solutions for next-generation adaptive compute and communication platforms. The role involves RTL design FPGA i...