Senior Staff Engineer, SOC Design

Please Note:

To provide the best candidate experience amidst our high application volumes each candidate is limited to 10 applications across all open jobs within a 6-month period.

Advancing the Worlds Technology Together

Our technology solutions power the tools you use every day--including smartphones electric vehicles hyperscale data centers IoT devices and so much more. Here youll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of whats possible and powering the future.

We believe innovation and growth are driven by an inclusive culture and a diverse workforce. Were dedicated to empowering people to be their true selves. Together were building a better tomorrow for our employees customers partners and communities.

What Youll Do

TheDRAM Development Lab(DDL) is part of Samsungs Memory Business Unit the industrys technology and volume leader in DRAM HBM and NAND Flash. DDLs vision is to solve key problems of Cloud & Data center by developing the new technology for memory and storage. The SoC Architecture team is involved in SoClevel designs for emerging memory/storage solutions and validates each designs feasibility with handson RTL implementation. We are an integral part of Samsungs strong R&D focus & lab innovation engine. We work closely with development teams to bring feature innovation to product roadmaps.

This role offers the opportunity to shape next-generation SoC and subsystem architectures while staying deeply hands-on in RTL design integration and validation. It is ideal for engineers who want to turn advanced memory and storage concepts into real hardware and drive them all the way to silicon

Job ID: 42896

Location: Daily onsite presence at our Folsom office in alignment with our Flexible Work policy

• Collaborate with architecture design verification and system teams to define and implement SoC features and subsystems
• Translate architectural requirements into microarchitecture RTL design and verification plans
• Design and develop RTL for SoC blocks and integration logic using SystemVerilog/Verilog
• Drive block- and SoC-level integration activities including clocking reset power intent interfaces and configuration infrastructure
• Analyze performance power area and timing tradeoffs to deliver efficient and scalable designs
• Support design verification by debugging issues found in simulation emulation formal analysis and silicon validation
• Participate in presilicon validation and postsilicon bringup including rootcause analysis and issue resolution
• Contribute to technical documentation block specification test plans and design reviews

What You Bring

• Bachelors in Electrical Computer Science or related with 15 years of experience or Masters in Electrical Computer Science or related Science with 13 years of Industry Experience or PhD in Electrical Computer Science or related Science with 10 years of Industry experience preferred.
• Strong technical background in SSD architecture and storage technologies including controller architecture NAND/flash behavior data path design and system performance consideration.
• Familiarity with DRAM architecture and memory subsystem design including memory hierarchy bandwidth/latency tradeoffs buffering and traffic behaviors.
• Experience with data integrity and protection mechanisms such as ECC parity CRC RAID and end-to-end data protection schemes.
• Experience contributing to complex hardware products from architecture definition through RTL implementation verification and silicon bring-up.
• Proven ability to collaborate effectively across architecture design verification firmware and validation teams.
• Youre inclusive adapting your style to the situation and diverse global norms of our people.
• An avid learner you approach challenges with curiosity and resilience seeking data to help build understanding.
• Youre collaborative building relationships humbly offering support and openly welcoming approaches.
• Innovative and creative you proactively explore new ideas and adapt quickly to change.

#LI-SF1

Equal Opportunity Employment Policy

Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel regardless of race religion color age disability sex gender identity sexual orientation ancestry genetic information marital status national origin political affiliation or veteran status.

When selecting team members we prioritize talent and qualities such as humility kindness and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities long-term conditions neurodivergent individuals or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations.

Recruiting Agency Policy

We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor Inc. are permitted to submit resumes for any job openings.

Applicant AI Use Policy

At Samsung Semiconductor we support innovation and technology. However to ensure a fair and authentic assessment we prohibit the use of generative AI tools to misrepresent a candidates true skills and qualifications. Permitted uses are limited to basic preparation grammar and research but all submitted content and interview responses must reflect the candidates genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process.

Applicant Privacy Policy
Experience:

Staff IC