Sr. Package Design Engineer

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profile Job Location:

San Jose, CA - USA

profile Monthly Salary: Not Disclosed
Posted on: Yesterday
Vacancies: 1 Vacancy

Job Summary

Note:

  • Primary Skills: asic package designs package designSI/PI routingsubstarate design HFSS Modeling and Simulation Semiconductor Packaging
  • Only USC or GC
  • NO JOB HOPPERS PLEASE AND STRONG CANDIDATES

We are seeking a Senior Package Design Engineer to join our custom SOC/ASIC development client. Youll work closely with cross-functional teams in the U.S. and overseas on high-performance package substrate design with a focus on signal/power integrity and routing.

Key Responsibilities:

  • Perform package substrate design and analysis (SI/PI/routing)
  • Collaborate with layout engineers marketing and global design teams
  • Use tools like HFSS ADS for package modeling/simulation
  • Contribute during pre/post-sales processes

Qualifications

  • BS in EE or related field; MS preferred
  • 8 10 years of experience in semiconductor package design
  • Strong SI/PI analysis modeling and simulation skills
  • Excellent communication teamwork and presentation abilities

Preferred Skills:

  • Expertise in high-speed package/PCB design (SerDes PCIe LPDDR Ethernet)
  • Time/frequency domain analysis impedance jitter eye-diagram BER analysis
  • Experience with Hspice Redhawk electro-thermal simulation PDN modeling
  • Familiarity with reliability analysis and packaging/assembly rules

Why is This a Great Opportunity

  • outstanding technology great opportuity to learn. Growing company with a lot of IP. Everyone contributes.
Note: Primary Skills: asic package designs package designSI/PI routingsubstarate design HFSS Modeling and Simulation Semiconductor Packaging Only USC or GC NO JOB HOPPERS PLEASE AND STRONG CANDIDATES We are seeking a Senior Package Design Engineer to join our custom SOC/ASIC development c...
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