Job Responsibilities:
Protocol Stack Design and Maintenance
- Design and maintain the NVMe protocol stack including Admin and I/O command processing and Submission/Completion Queue management.
- Ensure full compliance with the latest NVMe specifications and PCIe Gen5 protocol requirements.
- Design and implement SMBus and I3C communication protocols ensuring reliable and accurate data exchange with the host controller.
Command Processing and Flow Control
- Implement NVMe command parsing data transfer mechanisms and completion flows supporting multi-namespace operations.
- Implement SMBus/I3C read/write commands and data flow including status monitoring temperature/voltage reporting and control command handling.
Error Reporting and Recovery
- Implement proper status code reporting Asynchronous Event Notification (AEN) and error recovery flows to ensure host compatibility.
- Handle timeout abort and reset scenarios to maintain system stability and minimize host impact.
- Design SMBus/I3C error detection and retry mechanisms to prevent transmission errors from causing system failures.
Compliance and Interoperability
- Verify compatibility with industry-standard NVMe compliance tools and host platforms.
- Validate SMBus and I3C communication against JEDEC/MIPI specifications to ensure broad interoperability with different host systems and controllers.
Debug and Validation
- Capture and analyze PCIe/NVMe transactions using protocol analyzers logic analyzers and firmware logs.
- Monitor SMBus/I3C transfers analyze timing and error conditions and ensure firmware implementation is stable and reliable.
- Collaborate with validation teams to execute compliance stress and corner-case tests including hot-plug power management error injection and multi-protocol concurrency tests.
- Provide root-cause analysis and implement fixes for protocol-related issues found during validation or in customer systems.
Minimum Requirements:
- Masters degree in Electrical Engineering Computer Engineering Computer Science or related fields.
- At least 3 years work experience in each of the following:
- Software/firmware applications engineering
- Experience in SSD controller/firmware architecture
- Strong experience in C/C programming and data structure
- Hands on experience with JTAG/ICE debuggers
- Experience with version control software like Git.
- Competent to work independently as well as in a small team collaboration environment.
- Must be willing to learn fast and execute as a team player.
- Good oral written and presentation skills for communication and documentation.
- Ability to work independently with a minimum of day-to-day supervision.
Preferred Qualifications:
- The ability to operate logic analyzer oscilloscope and bus protocol analyzer is valuable.
- Familiar with SATA/PCIe (NVMe) protocols
- Familiar with NAND flash protocols
- Linux system debug experience.
- Fluent in reading and writing Mandarin preferred.
Work Location: Rancho Cordova CA
Estimated Base Pay Range (USD) for this full-time position is:
$150000 - $210000 $ per annum
The successful candidates starting base pay will be determined based on job-related skills experience qualifications work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
- Highly competitive salaries differentiated by performance.
- Annual merit increases
- Year-end bonus
- RSU for eligible employees
- Invention and Patent Awards
- 401(k) Employer Matching
- Length of Service Awards
- We offer comprehensive health insurance plans for eligible employees and dependents. There are plans to meet the needs of you and your family.
Job Responsibilities: Protocol Stack Design and Maintenance Design and maintain the NVMe protocol stack including Admin and I/O command processing and Submission/Completion Queue management. Ensure full compliance with the latest NVMe specifications and PCIe Gen5 protocol requirements. Design and i...
Job Responsibilities:
Protocol Stack Design and Maintenance
- Design and maintain the NVMe protocol stack including Admin and I/O command processing and Submission/Completion Queue management.
- Ensure full compliance with the latest NVMe specifications and PCIe Gen5 protocol requirements.
- Design and implement SMBus and I3C communication protocols ensuring reliable and accurate data exchange with the host controller.
Command Processing and Flow Control
- Implement NVMe command parsing data transfer mechanisms and completion flows supporting multi-namespace operations.
- Implement SMBus/I3C read/write commands and data flow including status monitoring temperature/voltage reporting and control command handling.
Error Reporting and Recovery
- Implement proper status code reporting Asynchronous Event Notification (AEN) and error recovery flows to ensure host compatibility.
- Handle timeout abort and reset scenarios to maintain system stability and minimize host impact.
- Design SMBus/I3C error detection and retry mechanisms to prevent transmission errors from causing system failures.
Compliance and Interoperability
- Verify compatibility with industry-standard NVMe compliance tools and host platforms.
- Validate SMBus and I3C communication against JEDEC/MIPI specifications to ensure broad interoperability with different host systems and controllers.
Debug and Validation
- Capture and analyze PCIe/NVMe transactions using protocol analyzers logic analyzers and firmware logs.
- Monitor SMBus/I3C transfers analyze timing and error conditions and ensure firmware implementation is stable and reliable.
- Collaborate with validation teams to execute compliance stress and corner-case tests including hot-plug power management error injection and multi-protocol concurrency tests.
- Provide root-cause analysis and implement fixes for protocol-related issues found during validation or in customer systems.
Minimum Requirements:
- Masters degree in Electrical Engineering Computer Engineering Computer Science or related fields.
- At least 3 years work experience in each of the following:
- Software/firmware applications engineering
- Experience in SSD controller/firmware architecture
- Strong experience in C/C programming and data structure
- Hands on experience with JTAG/ICE debuggers
- Experience with version control software like Git.
- Competent to work independently as well as in a small team collaboration environment.
- Must be willing to learn fast and execute as a team player.
- Good oral written and presentation skills for communication and documentation.
- Ability to work independently with a minimum of day-to-day supervision.
Preferred Qualifications:
- The ability to operate logic analyzer oscilloscope and bus protocol analyzer is valuable.
- Familiar with SATA/PCIe (NVMe) protocols
- Familiar with NAND flash protocols
- Linux system debug experience.
- Fluent in reading and writing Mandarin preferred.
Work Location: Rancho Cordova CA
Estimated Base Pay Range (USD) for this full-time position is:
$150000 - $210000 $ per annum
The successful candidates starting base pay will be determined based on job-related skills experience qualifications work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
- Highly competitive salaries differentiated by performance.
- Annual merit increases
- Year-end bonus
- RSU for eligible employees
- Invention and Patent Awards
- 401(k) Employer Matching
- Length of Service Awards
- We offer comprehensive health insurance plans for eligible employees and dependents. There are plans to meet the needs of you and your family.
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