DFT & Post-Silicon Engineer

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profile Job Location:

Barcelona - Spain

profile Monthly Salary: Not Disclosed
Posted on: 7 days ago
Vacancies: 1 Vacancy

Job Summary

Job Description

Our client is expanding their hardware engineering team and is looking for engineers with strong experience in Design for Test and post-silicon validation. This role focuses on ensuring testability manufacturability and production readiness of complex SoC and chiplet based designs.

You will work closely with design validation and production teams to develop and implement test strategies across the full silicon lifecycle.

Location: Barcelona Spain - Hybrid

Responsibilities:

As a Senior SoC Top Engineer your broad responsibilities will include but are not limited to:

  • Define and implement DFT architectures to improve testability and debug capabilities

  • Insert and validate DFT features such as scan chains BIST and JTAG

  • Optimize test methodologies to reduce cost improve coverage and increase yield

  • Develop test plans and strategies across silicon package and system levels

  • Implement automated test solutions for production and characterization

  • Ensure full test coverage from pre-silicon to mass production

  • Support yield analysis and post-silicon validation activities

  • Collaborate with design validation packaging and operations teams

  • Align test strategies with product requirements and timelines

Additional Responsibilities for Senior Engineers

  • Drive improvements in DFT methodologies and test efficiency

  • Lead initiatives focused on yield optimization and production quality

  • Contribute to process improvements across test and manufacturing flows

Additional Responsibilities for Lead Engineers

  • Define overall DFT architecture and technical direction

  • Own delivery quality and execution of DFT across project milestones

  • Lead and mentor DFT and post-silicon engineering teams

  • Coordinate work across design validation and production teams

  • Act as escalation point for complex technical challenges

  • Drive long term strategy for test and validation methodologies

Requirements:

DFT & Post-Silicon Engineer

  • 4 years of relevant industry experience (mid level)

  • 8 years for senior level

  • Strong experience with DFT methodologies in SoC or SiP environments

  • Experience with scan BIST JTAG and test architecture implementation

  • Background in post-silicon validation and yield analysis

  • Experience defining test strategies for production environments

  • RTL and testbench development using SystemVerilog or Verilog

  • Scripting experience with Python Tcl or Shell

  • Experience working with complex semiconductor design flows

Additional Requirements for Lead Engineers

  • Proven experience leading technical projects or teams

  • Strong ownership of DFT strategy and execution

  • Ability to define architecture and drive technical decisions

  • Experience coordinating cross functional engineering efforts

  • Strong communication and mentoring skills

    Nice to have

    • Experience with Tessent or similar DFT tools

    • Knowledge of advanced node design flows

    • Experience with chiplet based architectures

    • Familiarity with EDA toolchains and production test environments

      Whats in it for you

Our client offers an exciting challenging role in a collaborative dynamic environment. The right person will find many career growth opportunities in their company whether you want to advance your technical skills or aspire to leadership in the future.

Benefits:

  • Flexible working hours ( You can work between 7 AM and 7 PM )

  • Hybrid model one day remote per week

  • One week per year work from anywhere

  • 25 days annual leave plus additional December 24 and 31

  • Private medical insurance

  • Relocation package including flight visa support first month accommodation

  • Relocation support for family

  • Virtual shares

  • Spanish language classes

Job Description Our client is expanding their hardware engineering team and is looking for engineers with strong experience in Design for Test and post-silicon validation. This role focuses on ensuring testability manufacturability and production readiness of complex SoC and chiplet based designs.Yo...
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