Caliber engineer with rich PCIe experience
Milpitas CA
We are looking for a high-caliber engineer with rich PCIe experience to own the end-to-end system design for our next-generation NVMe SSD product lines. You will bridge the gap between ASIC/SoC integration firmware architecture and platform interoperability.
Look for someone with minimum 8-10 years of PCIe experience.
Core Responsibilities
- Architecture & Design: Own the system-level PCIe Gen5/Gen6 architecture from an endpoint perspective including PHY/MAC review and SoC integration.
- Driver & Firmware Leadership: Serve as a technical lead for high-performance PCIe kernel-mode drivers (Linux/Windows) and define firmware guidelines for robust link training (LTSSM) and power management.
- Complex Topologies: Architect driver logic for sophisticated hardware setups involving external PCIe switches and multiple endpoints.
- Validation & Debug: Lead system-level triage for PCIe behaviours including AER (Advanced Error Reporting) reset flows and interoperability across diverse host platforms.
- Compliance: Ensure full adherence to PCI-SIG standards and NVMe specifications during bring-up and qualification.
- Mentorship: Provide technical direction and mentor junior engineers fostering a culture of excellence in low-level software and high-speed design.
Required Skills & Qualifications
- Education: Bachelors or Masters in Electrical/Computer Engineering or related field.
- Protocol Expertise: Deep knowledge of PCIe Gen5/Gen6 NVMe and high-speed interface solutions like SerDes.
- Programming: Proficient in C/C for embedded systems and Python for test automation and triage.
- Lab Proficiency: Hands-on experience with protocol analyzers oscilloscopes and logic analyzers for hardware/firmware debug.
- Architecture: Strong understanding of SoC/ASIC registers power domains and sideband signaling.
Caliber engineer with rich PCIe experience Milpitas CA We are looking for a high-caliber engineer with rich PCIe experience to own the end-to-end system design for our next-generation NVMe SSD product lines. You will bridge the gap between ASIC/SoC integration firmware architecture and platform...
Caliber engineer with rich PCIe experience
Milpitas CA
We are looking for a high-caliber engineer with rich PCIe experience to own the end-to-end system design for our next-generation NVMe SSD product lines. You will bridge the gap between ASIC/SoC integration firmware architecture and platform interoperability.
Look for someone with minimum 8-10 years of PCIe experience.
Core Responsibilities
- Architecture & Design: Own the system-level PCIe Gen5/Gen6 architecture from an endpoint perspective including PHY/MAC review and SoC integration.
- Driver & Firmware Leadership: Serve as a technical lead for high-performance PCIe kernel-mode drivers (Linux/Windows) and define firmware guidelines for robust link training (LTSSM) and power management.
- Complex Topologies: Architect driver logic for sophisticated hardware setups involving external PCIe switches and multiple endpoints.
- Validation & Debug: Lead system-level triage for PCIe behaviours including AER (Advanced Error Reporting) reset flows and interoperability across diverse host platforms.
- Compliance: Ensure full adherence to PCI-SIG standards and NVMe specifications during bring-up and qualification.
- Mentorship: Provide technical direction and mentor junior engineers fostering a culture of excellence in low-level software and high-speed design.
Required Skills & Qualifications
- Education: Bachelors or Masters in Electrical/Computer Engineering or related field.
- Protocol Expertise: Deep knowledge of PCIe Gen5/Gen6 NVMe and high-speed interface solutions like SerDes.
- Programming: Proficient in C/C for embedded systems and Python for test automation and triage.
- Lab Proficiency: Hands-on experience with protocol analyzers oscilloscopes and logic analyzers for hardware/firmware debug.
- Architecture: Strong understanding of SoC/ASIC registers power domains and sideband signaling.
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