Contact Details:
1. Saravanan Ganesan
Email :
Phone:
Job Title: Optical Engineer III
Location: Redmond WA
Duration: 6 Months
Years of Experience: 5 Years
Required Hours/Week: 40 Hours/Week
Duties and Responsibilities:
- Design end-to-end PICs (components full circuits including active devices).
- Create fabrication-ready layouts aligned with foundry PDKs.
- Perform simulation optimization and parametric analysis.
- Support full lifecycle: concept design tapeout.
- Collaborate with TPMs researchers and cross-functional teams.
Required Skills and Experience:
- PIC Design & Simulation: 3 years designing simulating and laying out PICs for visible/IR wavelengths. Experience across full PIC flow (component circuit level)
- Photonic Modeling Tools: 3 years using tools like Lumerical Ansys Photonics Synopsys RSoft or COMSOL.
- PIC Layout & GDSII: 2 years with layout tools (KLayout Cadence Virtuoso gdsfactory). GDSII generation design rule verification PDK integration
- Tapeout / Foundry Experience: 1 years supporting or executing PIC tapeouts at commercial foundries. Understanding of fabrication constraints (loss roughness etch effects).
- Programming: 2 years using Python or MATLAB for scripting / automation / analysis.
Preferred Skills:
- Circuit-Level Simulation: 2 years with tools like Lumerical Interconnect OptSim or VPIphotonics.
- Device Characterization & Testing: 2 years in optical/electro-optic measurements.
- Optics & Packaging: 1 years with fiber optics free-space optics PIC packaging.
- Fabrication Awareness: 1 years understanding semiconductor fabrication variability & performance limits.
- Design for Manufacturability: Experience incorporating fabrication constraints into PIC designs (feature size optimization bend radius tapering loss reduction techniques).
Education:
- MS or Ph.D. in Electrical Engineering Optical Sciences Physics or related field
Contact Details: 1. Saravanan Ganesan Email : Phone: Job Title: Optical Engineer III Location: Redmond WA Duration: 6 Months Years of Experience: 5 Years Required Hours/Week: 40 Hours/Week Duties and Responsibilities: Design end-to-end PICs (components full circuits including ac...
Contact Details:
1. Saravanan Ganesan
Email :
Phone:
Job Title: Optical Engineer III
Location: Redmond WA
Duration: 6 Months
Years of Experience: 5 Years
Required Hours/Week: 40 Hours/Week
Duties and Responsibilities:
- Design end-to-end PICs (components full circuits including active devices).
- Create fabrication-ready layouts aligned with foundry PDKs.
- Perform simulation optimization and parametric analysis.
- Support full lifecycle: concept design tapeout.
- Collaborate with TPMs researchers and cross-functional teams.
Required Skills and Experience:
- PIC Design & Simulation: 3 years designing simulating and laying out PICs for visible/IR wavelengths. Experience across full PIC flow (component circuit level)
- Photonic Modeling Tools: 3 years using tools like Lumerical Ansys Photonics Synopsys RSoft or COMSOL.
- PIC Layout & GDSII: 2 years with layout tools (KLayout Cadence Virtuoso gdsfactory). GDSII generation design rule verification PDK integration
- Tapeout / Foundry Experience: 1 years supporting or executing PIC tapeouts at commercial foundries. Understanding of fabrication constraints (loss roughness etch effects).
- Programming: 2 years using Python or MATLAB for scripting / automation / analysis.
Preferred Skills:
- Circuit-Level Simulation: 2 years with tools like Lumerical Interconnect OptSim or VPIphotonics.
- Device Characterization & Testing: 2 years in optical/electro-optic measurements.
- Optics & Packaging: 1 years with fiber optics free-space optics PIC packaging.
- Fabrication Awareness: 1 years understanding semiconductor fabrication variability & performance limits.
- Design for Manufacturability: Experience incorporating fabrication constraints into PIC designs (feature size optimization bend radius tapering loss reduction techniques).
Education:
- MS or Ph.D. in Electrical Engineering Optical Sciences Physics or related field
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