Chip LeadIC Architect

IC Architect Job Description

An experienced IC Architect defines and delivers cutting-edge systems-on-chip (SoC) architectures for next-generation this role he translates product requirements into a robust architecture balancing performance power area and cost. He leads the architecture definition guide design teams and ensure successful tape-out and production.

Key Responsibilities

• Architecture Definition: Architect the overall IC structure including digital analog and mixed-signal blocks (in collaboration with analog IC architect) and test strategy.
• Requirements Translation: Convert high-level product specifications into detailed technical requirements for design teams.
• System-Level Optimization: Balance trade-offs in performance power area and cost to meet product goals.
• Cross-Functional Collaboration: Work closely with product managers software architects and customers to clarify customer requirements; align with project managers on resources schedules and milestones.
• Technical Leadership: Mentor and guide design engineers and sub-system architects throughout development and implementation.
• Supplier & Partner Interaction: Define technical interfaces and ensure alignment with external suppliers.
• Project Governance: Support structured project execution and maintain communication with local and remote teams.
• Expertise Application: Drive end-to-end chip deliveryfrom concept and specification to tape-out and then towards qualification and production.

Core Competencies

• Deep knowledge of ASIC digital design flow (RTL to GDSII).
• Ability to take concepts through production and tape-out including performance analysis cost optimization and risk mitigation.
• Master the SoC design flow and strong understanding of verification methodologies (e.g. UVM).
• Excellent communication skills and a collaborative mindset.

Qualifications

• Education: Masters or PhD in Electronics Microelectronics or related field.
• Experience: 1020 years in full-chip design SoC architecture and delivery.
• Technical Expertise:
  • SoC integration and system architecture.
  • Digital design flow and integration of analog/mixed-signal IPs.
  • Proficiency in VHDL Verilog and/or SystemVerilog.
  • Functional verification at IP subsystem and top levels.
  • Familiarity with tape-out processes and fab interactions.
• Domain Knowledge: CPU/DSP-based ICs power management ultra-low power power/area/speed optimization & trade-off
• Drive and follow the physical implementation / physical design
• Be able to define requirements and discuss specifications of physical IPs like IOs memories and standard cells.
• Aware of ESD constraints and issues
• Configuration management design databases and release processes are no unknown concepts
• Soft Skills: Proactive structured quality-oriented and able to work independently and in a team.
• Good communication and English language skills are a necessity

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