Role: ASIC Verification Engineer (ARM IP)
Work Location:Anywhere in the world (must work in EST time zone)
Travel:Quarterly travel to Paris for approximately 1 week based on project needs
Duration:12 Months Contract
Language:French language skills are a plus but not mandatory
Role Overview
We are looking for an experiencedASIC Verification Engineerto support the verification of advancedAI-accelerated ASIC designsused in next-generation hardware platforms. This role focuses heavily onARM-based IP verificationand requires strong experience validating complex SoC components in advanced silicon environments.
The selected candidate will work closely with a global engineering team responsible for ensuring the reliability and performance of high-efficiency silicon designs used in cutting-edge hardware technologies.
Key Responsibilities
- Lead and execute verification activities forARM-based IP blockswithin complex ASIC/SoC designs.
- Develop and maintainverification environments using System Verilog and UVM methodologies.
- Create and executetest plans test cases and regression suitesto validate design functionality.
- Performcoverage analysis debugging and verification closure activities.
- Participate indesign and architecture reviewsrelated to ARM CPU GPU and debug components.
- Implement and maintainconstraint-random and assertion-based verification techniques.
- Supportgate-level simulation (GLS)and verification across multiple stages of the development lifecycle.
- Collaborate with cross-functional teams including design architecture and software teams to resolve issues and improve product quality.
- Contribute to improving verification processes methodologies and best practices across the engineering team.
Required Skills and Experience
- 5 years of hands-on ASIC/SoC verification experiencein semiconductor or hardware design environments.
- Strong expertise inSystem Verilog and UVM verification methodologies.
- Solid experience withARM architecture and related IPssuch as Cortex-A processors Mali GPU CoreSight CSS600 or similar components.
- Experience withformal verification assertions constraint-random verification and coverage-driven verification.
- Familiarity withcoverage metrics coverage analysis and debugging complex hardware verification issues.
- Experience runninggate-level simulations and verification performance validation.
- Ability to write and maintainC-based test programs for configuring and validating ARM IP blocks.
- Strong problem-solving skills and the ability to work independently in a highly technical environment.
Preferred Qualifications
- Exposure toadvanced silicon nodes (5nm or smaller)is a plus.
- Experience working inlarge distributed engineering teams.
- Knowledge oflow-power ASIC design verificationis advantageous.
- French language skills are beneficial but optional.
Role: ASIC Verification Engineer (ARM IP)Work Location:Anywhere in the world (must work in EST time zone)Travel:Quarterly travel to Paris for approximately 1 week based on project needsDuration:12 Months ContractLanguage:French language skills are a plus but not mandatoryRole OverviewWe are looking ...
Role: ASIC Verification Engineer (ARM IP)
Work Location:Anywhere in the world (must work in EST time zone)
Travel:Quarterly travel to Paris for approximately 1 week based on project needs
Duration:12 Months Contract
Language:French language skills are a plus but not mandatory
Role Overview
We are looking for an experiencedASIC Verification Engineerto support the verification of advancedAI-accelerated ASIC designsused in next-generation hardware platforms. This role focuses heavily onARM-based IP verificationand requires strong experience validating complex SoC components in advanced silicon environments.
The selected candidate will work closely with a global engineering team responsible for ensuring the reliability and performance of high-efficiency silicon designs used in cutting-edge hardware technologies.
Key Responsibilities
- Lead and execute verification activities forARM-based IP blockswithin complex ASIC/SoC designs.
- Develop and maintainverification environments using System Verilog and UVM methodologies.
- Create and executetest plans test cases and regression suitesto validate design functionality.
- Performcoverage analysis debugging and verification closure activities.
- Participate indesign and architecture reviewsrelated to ARM CPU GPU and debug components.
- Implement and maintainconstraint-random and assertion-based verification techniques.
- Supportgate-level simulation (GLS)and verification across multiple stages of the development lifecycle.
- Collaborate with cross-functional teams including design architecture and software teams to resolve issues and improve product quality.
- Contribute to improving verification processes methodologies and best practices across the engineering team.
Required Skills and Experience
- 5 years of hands-on ASIC/SoC verification experiencein semiconductor or hardware design environments.
- Strong expertise inSystem Verilog and UVM verification methodologies.
- Solid experience withARM architecture and related IPssuch as Cortex-A processors Mali GPU CoreSight CSS600 or similar components.
- Experience withformal verification assertions constraint-random verification and coverage-driven verification.
- Familiarity withcoverage metrics coverage analysis and debugging complex hardware verification issues.
- Experience runninggate-level simulations and verification performance validation.
- Ability to write and maintainC-based test programs for configuring and validating ARM IP blocks.
- Strong problem-solving skills and the ability to work independently in a highly technical environment.
Preferred Qualifications
- Exposure toadvanced silicon nodes (5nm or smaller)is a plus.
- Experience working inlarge distributed engineering teams.
- Knowledge oflow-power ASIC design verificationis advantageous.
- French language skills are beneficial but optional.
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