Position: FPGA Verification Engineer-Science Ai Engineer
Location: Mountain View CA***Day 1 Onsite***
Mandatory Areas
Must Have Skills
Skill 1 - Strong understanding of FPGA design principles and architectures
Skill 2 Proficiency in System Verilog and UVM verification methodology
Skill 3 Experience in FPGA verification
Good To have Skills
Skill 1 Experience with scripting languages (e.g. Python Perl).
Mandatory if Applicable
Domain Experience (If any) FPGA Verification
Must have Certifications NA
Prior UST experience NA
Location Mountain View CA
Onsite Requirement Yes
Number of days onsite 5 Days
Job Description
* Strong understanding of FPGA design principles and architectures.
* Proficiency in System Verilog and UVM verification methodology.
* Experience with industry-standard verification tools (e.g. QuestaSim Synopsys VCS).
* Knowledge of code coverage and functional coverage analysis.
* Excellent debugging and problem-solving skills.
* Strong communication and collaboration skills.
Requirements
* Bachelors or masters degree in electrical engineering Computer Engineering or a related field.
* Experience in FPGA verification.
* Experience with scripting languages (e.g. Python Perl).
* Familiarity with hardware description languages (e.g. VHDL Verilog).
Position: FPGA Verification Engineer-Science Ai Engineer Location: Mountain View CA***Day 1 Onsite*** Mandatory Areas Must Have Skills Skill 1 - Strong understanding of FPGA design principles and architectures Skill 2 Proficiency in System Verilog and UVM verification methodology Skil...
Position: FPGA Verification Engineer-Science Ai Engineer
Location: Mountain View CA***Day 1 Onsite***
Mandatory Areas
Must Have Skills
Skill 1 - Strong understanding of FPGA design principles and architectures
Skill 2 Proficiency in System Verilog and UVM verification methodology
Skill 3 Experience in FPGA verification
Good To have Skills
Skill 1 Experience with scripting languages (e.g. Python Perl).
Mandatory if Applicable
Domain Experience (If any) FPGA Verification
Must have Certifications NA
Prior UST experience NA
Location Mountain View CA
Onsite Requirement Yes
Number of days onsite 5 Days
Job Description
* Strong understanding of FPGA design principles and architectures.
* Proficiency in System Verilog and UVM verification methodology.
* Experience with industry-standard verification tools (e.g. QuestaSim Synopsys VCS).
* Knowledge of code coverage and functional coverage analysis.
* Excellent debugging and problem-solving skills.
* Strong communication and collaboration skills.
Requirements
* Bachelors or masters degree in electrical engineering Computer Engineering or a related field.
* Experience in FPGA verification.
* Experience with scripting languages (e.g. Python Perl).
* Familiarity with hardware description languages (e.g. VHDL Verilog).
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