Principle Application Engineer Verification

At Cadence we hire and develop leaders and innovators who want to make an impact on the world of technology.

We are seeking a highly skilled Senior SoC Verification Engineer with 6 years of handson experience in complex SoC verification. The ideal candidate has strong expertise in UVMbased environments deep understanding of SoC architecture and practical experience verifying application processors AI accelerators or other highperformance chips. This role focuses on technical depth rather than people management requiring strong ownership problemsolving ability and broad protocol knowledge.

Key Responsibilities

• Develop and execute verification plans for complex SoC subsystems and fullchip environments.
• Build enhance and maintain UVMbased verification environments including agents sequences scoreboards and coverage models.
• Perform blocklevel subsystemlevel and SoClevel verification including IT (Integration Test) UT (Unit Test) and ST (System Test).
• Verify integration of thirdparty IPs custom logic and systemlevel features.
• Debug functional issues across RTL testbench and SoC integration layers.
• Analyze coverage metrics identify gaps and drive closure for functional code and assertion coverage.
• Collaborate closely with design architecture and validation teams to ensure design intent and testability.
• Support bringup and validation on emulation/FPGA platforms when required.
• Contribute to continuous improvement of verification methodologies automation and infrastructure.
• Document test plans test results and verification reports with clarity and completeness.

Required Qualifications

• Bachelors/Masters degree in Electrical Engineering Computer Engineering or related field.
• 6 years of handson experience in digital SoC verification.
• Strong proficiency in SystemVerilog UVM constrainedrandom verification and coveragedriven methodology.
• Solid understanding of SoC architecture memory hierarchy cache systems interconnects and coherency concepts.
• Experience verifying AP (Application Processor) AI accelerator DSP multimedia or highperformance compute SoCs is highly desirable.
• Broad familiarity with industrystandard protocols such as AXI AHB APB PCIe USB DDR LPDDR MIPI Ethernet or similar.
• Strong debugging skills using waveform tools assertions and simulation logs.
• Handson experience with simulation emulation or acceleration platforms.
• Knowledge of lowpower verification (UPF) formal verification or performance validation is a plus.
• Ability to work effectively in crossfunctional and multisite teams.
• Strong communication skills and ability to articulate technical issues clearly.
• Selfdriven detailoriented and comfortable working in fastpaced environments.

Preferred Qualifications

• Experience with AI/ML hardware verification or highbandwidth compute subsystems.
• Familiarity with Python Perl or shell scripting for automation.
• Exposure to postsilicon validation flows.
• Understanding of DFT concepts and scan/MBIST interactions.

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