Analog DesignMemory Engineer, Bangalore

Bangalore - India

Monthly Salary: Not Disclosed

Posted on: Yesterday

Vacancies: 1 Vacancy

Job Summary

Candidate must work
Physical layout of analog circuitsTransistor-level placement Routing Matching techniques Parasitic optimization custom analog layout work.
Hands on with 2nm / 3nm (Lower Nodes).

Preferred skils
SRAM layout
Memory compiler layout
Bitcell layout
Sense amplifier layout
Memory periphery design

Memory layout at 2nm/3nm is highly complex strong candidates.

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Candidate must workPhysical layout of analog circuitsTransistor-level placement Routing Matching techniques Parasitic optimization custom analog layout work.Hands on with 2nm / 3nm (Lower Nodes).Preferred skils SRAM layout Memory compiler layout Bitcell layout Sense amplifier layout Memory periphery...