Senior Design Engineer (0093)

Southampton - UK

Monthly Salary: Not Disclosed

Posted on: Yesterday

Vacancies: 1 Vacancy

Job Summary

You will work on revolutionary technology that is at the leading edge of satellite communications a 5G base station to be deployed on board satellite. This technology will underpin the next generation of mobile standards giving complete coverage to the globe. AccelerComm develop the base band signal processing technology using hardware acceleration to generate world leading power efficiency.

You will work on the latest generation space qualified devices delivering standalone IP and IP integration with potential to explore implementation on AI Engines.

Key Responsibilities

As a Senior Hardware Design Engineer you will: -

Work closely with the Algorithm team to understand requirements and translate them into architectures for RTL implementations
Implement designs targeting both FPGA and ASIC using industry standard techniques including the creation of UVM based testbenches
Deploy your designs onto the latest FPGA development platforms for validation and system integration
Actively engage with and adhere to AccelerComm engineering methodology processes and design techniques being able to offer improvements to efficiency and quality for both the design flow and the final product
Collaborate with colleagues across the whole design flow: micro-architecture design verification physical implementation and optimisation for ASIC and FPGA

Skills Knowledge and Expertise

Essential:

Expert knowledge of an RTL language (Verilog SystemVerilog) for complex ASIC/FPGA products
A strong skillset in delivering digital designs in the ASIC and FPGA industry
Optimisation of timing and hardware resources for high throughput data or signal processing applications. Experience in power management techniques synthesis and timing analysis
Track record in collaborating across teams to produce integrated solutions
Experience in technical documentation writing design specifications user guides verification plans
Expert user of EDA tools for simulation and synthesis

Desirable:

Knowledge of communications signal processing algorithms (such as error correction equalisation channel estimation beamforming)
Familiar with the AMBA bus protocol
Understanding of UVM verification techniques or practical experience using UVM for IP verification
Experience using C/SystemC for design modelling and integration
Knowledge of a scripting language such as Python
Knowledge and appreciation of project methodologies across the design lifecycle including agile and waterfall requirement capture and traceability

Experience with AMD FPGAs and the associated design tools or with any EDAs ASIC backend tools

Required Experience:

Senior IC

You will work on the latest generation space qualified devices delivering standalone IP and IP integration with potential to explore implementation on AI Engines.

Key Responsibilities

As a Senior Hardware Design Engineer you will: -

Work closely with the Algorithm team to understand requirements and translate them into architectures for RTL implementations
Implement designs targeting both FPGA and ASIC using industry standard techniques including the creation of UVM based testbenches
Deploy your designs onto the latest FPGA development platforms for validation and system integration
Actively engage with and adhere to AccelerComm engineering methodology processes and design techniques being able to offer improvements to efficiency and quality for both the design flow and the final product
Collaborate with colleagues across the whole design flow: micro-architecture design verification physical implementation and optimisation for ASIC and FPGA

Skills Knowledge and Expertise

Essential:

Expert knowledge of an RTL language (Verilog SystemVerilog) for complex ASIC/FPGA products
A strong skillset in delivering digital designs in the ASIC and FPGA industry
Optimisation of timing and hardware resources for high throughput data or signal processing applications. Experience in power management techniques synthesis and timing analysis
Track record in collaborating across teams to produce integrated solutions
Experience in technical documentation writing design specifications user guides verification plans
Expert user of EDA tools for simulation and synthesis

Desirable:

Knowledge of communications signal processing algorithms (such as error correction equalisation channel estimation beamforming)
Familiar with the AMBA bus protocol
Understanding of UVM verification techniques or practical experience using UVM for IP verification
Experience using C/SystemC for design modelling and integration
Knowledge of a scripting language such as Python
Knowledge and appreciation of project methodologies across the design lifecycle including agile and waterfall requirement capture and traceability

Experience with AMD FPGAs and the associated design tools or with any EDAs ASIC backend tools

Required Experience:

Senior IC

Key Skills

Electrical Engineering
SOC
PCB
Warehouse Management
Warehouse Experience
CAD
Creo
SolidWorks
Data Mining
Digital design
Mechanical Engineering
Autocad

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About Company

AccelerComm

Our patented, market-leading IP solutions for 4G and 5G are configurable for quick, high-performance implementations across a wide range of applications.

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