Intern Design Engineering
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Job Location:
Monthly Salary:
Posted on:
19 hours ago
Vacancies:
1 Vacancy
Job Summary
At Cadence we hire and develop leaders and innovators who want to make an impact on the world of technology.
Job Responsibilities:
- Maintain the verification test bench and test template
- Maintain the testing flows and regression framework
- Define and manage verification/test plans
- Create the reference models of DSP instructions and accelerators
- Debug the DSP instruction and accelerator tests and collaborate with design engineers
- Analyze the functional and code coverage
Job Qualifications:
- Graduate student in CS/CE EE Telecom or equivalent
- Strong knowledge of computer architecture
- Proficiency in programming languages like C/C assembly Verilog
- Familiar with scripting languages like Perl Makefile
- Familiar with design verification methodology
- Self-motivated with excellent planning interpersonal and communication skills
- Good oral and written English
Addition Skills
- Familiar with SystemC or SystemVerilog
- Familiar with UVM
- Processor design/verification experience is highly desirable
Were doing work that matters. Help us solve what others cant.
Required Experience:
Intern
Key Skills
- Engineering
- Computer Operating
- Maintenance Engineering
- Asic
- Branding
About Company
Do you want to shape the future of technology? Cadence is leading the charge to solve some of technology’s toughest challenges. We work with the world’s most innovative companies, across a growing range of industries. Major trends that you hear about everyday – like artificial intell ... View more
