Network Researcher Research Data Plane Technology of HPC Network

Zürich - Switzerland

Monthly Salary: Not Disclosed

Posted on: 13 hours ago

Vacancies: 1 Vacancy

Job Summary

Huaweis vision is to enrich lives through communication and intelligent innovation.

As a global leader in information and communications technology (ICT) Huawei drives innovation in artificial intelligence cloud computing and smart device technologies. Through its Carrier Enterprise and Consumer business groups the company delivers advanced Network Infrastructure Cloud and AI Platforms and industry-leading devices.

Huawei supports 45 of the worlds top 50 telecom operators and serves one-third of the global population with operations in over 170 countries and a workforce of more than 200000 employees.

Huawei Technologies Switzerland AG contributes to this innovation through cutting-edge research with offices in Zurich and Lausanne focusing on High-Performance Computing Computer Architecture Computer Vision Robotics Artificial Intelligence Neuromorphic Computing Wireless Technologies Networking and related fields.

In this job opening we are seeking a highly motivated and visionary researcher to join our team focused on High Performance Computing Network. This role involves research and development in high-performance accelerator chip architecture and high-performance interconnection protocols aiming to overcome performance and scalability limits of traditional compute platforms.

Responsibilities:

Research the development direction and key technologies of next-generation communication/computing/storage networks including high-performance HPC/storage/AI training and inference networks high-performance accelerator chip architecture and high-performance interconnection protocols.
Conduct innovative research in micro/macro architecture chips and systems software/hardware and algorithms.
Oriented to data center scenarios support the optimization and evolution of next-generation network chip architecture and computing hardware infrastructure based on service features.

Requirements:

PhD in Computer Science Electrical Engineering Computer Engineering or a closely related field.
Strong background in interconnection networks and computer architecture is a must.
Demonstrated research expertise in one or more of the following areas:

High-performance accelerator chip architecture and high-performance interconnection protocols
Network-on-Chip (NoC) architecture including routing flow control topologies and performance modeling
Programming models and hardware/software interfaces (e.g. load/store message-passing RDMA shared memory models)
System-level modeling and simulation (e.g. cycle-accurate simulators)

Proven publication record in relevant peer-reviewed venues.
Excellent analytical problem-solving and system-level thinking skills.
Strong verbal and written communication skills in English and the ability to work both independently and collaboratively in a cross-disciplinary team.

Why join us:

Collaborate with world-class scientists and engineers in an open curiosity-driven environment;
Access to state-of-the-art technology and tools;
Opportunities for professional growth and development;
Competitive salary and a high quality of life in Zurich at the center of Europe;
Last but certainly not least: be part of innovative projects that make a difference.

Huaweis vision is to enrich lives through communication and intelligent innovation.As a global leader in information and communications technology (ICT) Huawei drives innovation in artificial intelligence cloud computing and smart device technologies. Through its Carrier Enterprise and Consumer busi...

Huaweis vision is to enrich lives through communication and intelligent innovation.

Huawei supports 45 of the worlds top 50 telecom operators and serves one-third of the global population with operations in over 170 countries and a workforce of more than 200000 employees.

Responsibilities:

Research the development direction and key technologies of next-generation communication/computing/storage networks including high-performance HPC/storage/AI training and inference networks high-performance accelerator chip architecture and high-performance interconnection protocols.
Conduct innovative research in micro/macro architecture chips and systems software/hardware and algorithms.
Oriented to data center scenarios support the optimization and evolution of next-generation network chip architecture and computing hardware infrastructure based on service features.

Requirements:

PhD in Computer Science Electrical Engineering Computer Engineering or a closely related field.
Strong background in interconnection networks and computer architecture is a must.
Demonstrated research expertise in one or more of the following areas:

High-performance accelerator chip architecture and high-performance interconnection protocols
Network-on-Chip (NoC) architecture including routing flow control topologies and performance modeling
Programming models and hardware/software interfaces (e.g. load/store message-passing RDMA shared memory models)
System-level modeling and simulation (e.g. cycle-accurate simulators)

Proven publication record in relevant peer-reviewed venues.
Excellent analytical problem-solving and system-level thinking skills.
Strong verbal and written communication skills in English and the ability to work both independently and collaboratively in a cross-disciplinary team.

Why join us:

Collaborate with world-class scientists and engineers in an open curiosity-driven environment;
Access to state-of-the-art technology and tools;
Opportunities for professional growth and development;
Competitive salary and a high quality of life in Zurich at the center of Europe;
Last but certainly not least: be part of innovative projects that make a difference.