Staff Process Integration Engineer, APTD

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence inspiring the world to learn communicate and advance faster than ever.

Department intro:

The Advanced Packaging Technology Development (APTD) department at Micron Technology is at the forefront of innovation driving the advancement of memory and storage Interconnects and Packaging solutions that transform how the world uses information. Micron is dedicated to developing innovative processes and technologies that enable the creation of next-generation semiconductor products which drive the AI revolution. By collaborating closely with our global R&D equipment and materials suppliers and manufacturing teams we ensure the efficient development transfer and implementation of new technology nodes maintaining Microns leadership in the industry.

Role overview:

As a Staff Process Integration Engineer in APTD at Micron you will own the endtoend integration of nextgeneration package architectures: 2.5D 3D stacking HBM memory integration and hybrid bonding. Youll lead new advanced packaging technology development technology transfer design DOEs analyze yield and reliability and coordinate across device design process equipment test and manufacturing teams to deliver high performance multidie technology. The role will operate in a cleanroom environment in full gowning adhering to EHS/cleanroom protocols. The role may require occasional travel to TD sites in Asia for integration development and transfer support.

Responsibilities:

• Own packagelevel process integration across 2.5D/3D flows (wafer-to-wafer chip-to-wafer advanced interconnects) defining specs and process windows that meet high performance targets for HPC/AI products

• Develop and integrate semiconductor manufacturing processes. Design optimize and implement fabrication flows that seamlessly integrate multiple steps including lithography etch deposition diffusion CMP and thin films into cohesive production processes.

• Analyze yield performance and defect data to root-cause process weaknesses yield issues and tool variances; Employ SPC and advanced analytics.

• Lead technology transfer from TD to TD and HVM establishing mask rules materials tool readiness baseline qualification and technology validation plans

• Design and execute experiments (DOEs) on bonding underfill molding stacking and integration steps. Apply SPC to parametrics and yield detractors validate new materials design rules to improve yield and device performance and close the loop with corrective actions.

• Manage hybrid bonding (CuCu dielectric) integration. Set surface prep planarity and alignment requirements. Qualify W2W/C2W flows and track defectivity and reliability.

• Optimize underfill TC bonding windows and pillar/bump geometries for highI/O assemblies

• Cooptimize TSV/interconnect routing and thermal paths to meet bandwidth/latency targets aligning package floorplans with chiplet partitioning

• Predict and mitigate wafer/die warpage engineering via modeling cureshrinkage controls and material/process levers; Validate with inline metrology.

• Leverage metrology and inspection skills to deploy SAM IR microscopy and emerging XRD warpage mapping to correlate processes defects and reliability

Minimum qualifications:

• BS or MS in Materials/Chemical Engineering

• 6 years in semiconductor technology development with cleanroom experience

• Handson knowledge of advanced interconnects and bonding flows

• Proficiency in DOE/SPC and data analysis (JMP/Minitab/Python) with demonstrated rootcause problem solving and yield improvement

• Experience with metrology; SAM Xray/CT IR warpage profilers (shadow moiré/DIC)

• Strong communication and technical writing skills with the ability to lead crossfunctional teams and drive action in fastpaced environments

• Direct experience with hybrid bonding integration and reliability (W2W/C2W)

• Warpage modeling and inline correlation experience

As a world leader in the semiconductor industry Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well provide peace of mind and help you prepare for the future. We offer a choice of medical dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury and paid family leave. Additionally Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available please see the Benefits Guide posted on is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race color religion sex sexual orientation age national origin citizenship status disability protected veteran status gender identity or any other factor protected by applicable federal state or local laws.

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